Lines Matching refs:clock
12 #include <dt-bindings/clock/r8a73a4-clock.h>
30 clock-frequency = <1500000000>;
121 clock-names = "fck";
329 clock-names = "sci_ick";
339 clock-names = "sci_ick";
349 clock-names = "sci_ick";
359 clock-names = "sci_ick";
369 clock-names = "sci_ick";
379 clock-names = "sci_ick";
464 compatible = "fixed-clock";
465 #clock-cells = <0>;
466 clock-frequency = <32768>;
467 clock-output-names = "extalr";
470 compatible = "fixed-clock";
471 #clock-cells = <0>;
472 clock-frequency = <25000000>;
473 clock-output-names = "extal1";
476 compatible = "fixed-clock";
477 #clock-cells = <0>;
478 clock-frequency = <48000000>;
479 clock-output-names = "extal2";
482 compatible = "fixed-clock";
483 #clock-cells = <0>;
485 clock-frequency = <0>;
486 clock-output-names = "fsiack";
489 compatible = "fixed-clock";
490 #clock-cells = <0>;
492 clock-frequency = <0>;
493 clock-output-names = "fsibck";
501 #clock-cells = <1>;
502 clock-output-names = "main", "pll0", "pll1", "pll2",
510 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
514 #clock-cells = <0>;
515 clock-output-names = "zb";
518 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
522 #clock-cells = <0>;
523 clock-output-names = "sdhi0ck";
526 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
530 #clock-cells = <0>;
531 clock-output-names = "sdhi1ck";
534 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
538 #clock-cells = <0>;
539 clock-output-names = "sdhi2ck";
542 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
546 #clock-cells = <0>;
547 clock-output-names = "mmc0";
550 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
554 #clock-cells = <0>;
555 clock-output-names = "mmc1";
558 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
563 #clock-cells = <0>;
564 clock-output-names = "vclk1";
567 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
572 #clock-cells = <0>;
573 clock-output-names = "vclk2";
576 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
581 #clock-cells = <0>;
582 clock-output-names = "vclk3";
585 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
590 #clock-cells = <0>;
591 clock-output-names = "vclk4";
594 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
599 #clock-cells = <0>;
600 clock-output-names = "vclk5";
603 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
607 #clock-cells = <0>;
608 clock-output-names = "fsia";
611 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
615 #clock-cells = <0>;
616 clock-output-names = "fsib";
619 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
623 #clock-cells = <0>;
624 clock-output-names = "mp";
627 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
630 #clock-cells = <0>;
631 clock-output-names = "m4";
634 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
638 #clock-cells = <0>;
639 clock-output-names = "hsi";
642 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
646 #clock-cells = <0>;
647 clock-output-names = "spuv";
652 compatible = "fixed-factor-clock";
654 #clock-cells = <0>;
655 clock-div = <2>;
656 clock-mult = <1>;
657 clock-output-names = "main_div2";
660 compatible = "fixed-factor-clock";
662 #clock-cells = <0>;
663 clock-div = <2>;
664 clock-mult = <1>;
665 clock-output-names = "pll0_div2";
668 compatible = "fixed-factor-clock";
670 #clock-cells = <0>;
671 clock-div = <2>;
672 clock-mult = <1>;
673 clock-output-names = "pll1_div2";
676 compatible = "fixed-factor-clock";
678 #clock-cells = <0>;
679 clock-div = <2>;
680 clock-mult = <1>;
681 clock-output-names = "extal1_div2";
690 #clock-cells = <1>;
691 clock-indices = <
697 clock-output-names =
710 #clock-cells = <1>;
711 clock-indices = <
719 clock-output-names =
729 #clock-cells = <1>;
730 clock-indices = <
734 clock-output-names =
741 #clock-cells = <1>;
742 clock-indices = <
745 clock-output-names =