Lines Matching refs:clock
101 clock-names = "refclk", "timclk", "apb_pclk";
102 #clock-cells = <1>;
103 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
125 clock-names = "apb_pclk";
137 clock-names = "mclk", "apb_pclk";
145 clock-names = "KMIREFCLK", "apb_pclk";
153 clock-names = "KMIREFCLK", "apb_pclk";
161 clock-names = "uartclk", "apb_pclk";
169 clock-names = "uartclk", "apb_pclk";
177 clock-names = "uartclk", "apb_pclk";
185 clock-names = "uartclk", "apb_pclk";
193 clock-names = "wdogclk", "apb_pclk";
201 clock-names = "timclken1", "timclken2", "apb_pclk";
209 clock-names = "timclken1", "timclken2", "apb_pclk";
236 clock-names = "apb_pclk";
252 clock-names = "clcdclk", "apb_pclk";
273 clock-frequency = <25175000>;
296 compatible = "fixed-clock";
297 #clock-cells = <0>;
298 clock-frequency = <24000000>;
299 clock-output-names = "v2m:clk24mhz";
303 compatible = "fixed-clock";
304 #clock-cells = <0>;
305 clock-frequency = <1000000>;
306 clock-output-names = "v2m:refclk1mhz";
310 compatible = "fixed-clock";
311 #clock-cells = <0>;
312 clock-frequency = <32768>;
313 clock-output-names = "v2m:refclk32khz";
373 /* MCC static memory clock */
377 #clock-cells = <0>;
378 clock-output-names = "v2m:oscclk0";
382 /* CLCD clock */
386 #clock-cells = <0>;
387 clock-output-names = "v2m:oscclk1";
391 /* IO FPGA peripheral clock */
395 #clock-cells = <0>;
396 clock-output-names = "v2m:oscclk2";