Lines Matching refs:clks
90 clocks = <&clks VF610_CLK_DMAMUX0>,
91 <&clks VF610_CLK_DMAMUX1>;
99 clocks = <&clks VF610_CLK_FLEXCAN0>,
100 <&clks VF610_CLK_FLEXCAN0>;
109 clocks = <&clks VF610_CLK_UART0>;
121 clocks = <&clks VF610_CLK_UART1>;
133 clocks = <&clks VF610_CLK_UART2>;
145 clocks = <&clks VF610_CLK_UART3>;
159 clocks = <&clks VF610_CLK_DSPI0>;
171 clocks = <&clks VF610_CLK_DSPI1>;
181 clocks = <&clks VF610_CLK_SAI2>;
193 clocks = <&clks VF610_CLK_PIT>;
203 clocks = <&clks VF610_CLK_FTM0>,
204 <&clks VF610_CLK_FTM0_EXT_SEL>,
205 <&clks VF610_CLK_FTM0_FIX_SEL>,
206 <&clks VF610_CLK_FTM0_EXT_FIX_EN>;
216 clocks = <&clks VF610_CLK_FTM1>,
217 <&clks VF610_CLK_FTM1_EXT_SEL>,
218 <&clks VF610_CLK_FTM1_FIX_SEL>,
219 <&clks VF610_CLK_FTM1_EXT_FIX_EN>;
227 clocks = <&clks VF610_CLK_ADC0>;
236 clocks = <&clks VF610_CLK_WDT>;
247 clocks = <&clks VF610_CLK_QSPI0_EN>,
248 <&clks VF610_CLK_QSPI0>;
322 clocks = <&clks VF610_CLK_USBPHY0>;
331 clocks = <&clks VF610_CLK_USBPHY1>;
342 clocks = <&clks VF610_CLK_I2C0>;
350 clks: ccm@4006b000 { label
362 clocks = <&clks VF610_CLK_USBC0>;
373 clocks = <&clks VF610_CLK_USBC0>;
401 clocks = <&clks VF610_CLK_DMAMUX2>,
402 <&clks VF610_CLK_DMAMUX3>;
416 clocks = <&clks VF610_CLK_SNVS>;
425 clocks = <&clks VF610_CLK_UART4>;
434 clocks = <&clks VF610_CLK_UART5>;
443 clocks = <&clks VF610_CLK_ADC1>;
452 clocks = <&clks VF610_CLK_IPG_BUS>,
453 <&clks VF610_CLK_PLATFORM_BUS>,
454 <&clks VF610_CLK_ESDHC1>;
463 clocks = <&clks VF610_CLK_USBC1>;
474 clocks = <&clks VF610_CLK_USBC1>;
484 clocks = <&clks VF610_CLK_FTM2>,
485 <&clks VF610_CLK_FTM3>,
486 <&clks VF610_CLK_FTM2_EXT_FIX_EN>,
487 <&clks VF610_CLK_FTM3_EXT_FIX_EN>;
495 clocks = <&clks VF610_CLK_ENET0>,
496 <&clks VF610_CLK_ENET0>,
497 <&clks VF610_CLK_ENET>;
506 clocks = <&clks VF610_CLK_ENET1>,
507 <&clks VF610_CLK_ENET1>,
508 <&clks VF610_CLK_ENET>;
517 clocks = <&clks VF610_CLK_FLEXCAN1>,
518 <&clks VF610_CLK_FLEXCAN1>;