Lines Matching refs:add
147 add r1, vcpu, \offset
167 add r1, vcpu, #VCPU_FIQ_REGS
189 add vcpu, vcpu, #(VCPU_USR_REGS)
202 add r2, vcpu, \offset
219 add r2, vcpu, #VCPU_USR_REG(3)
221 add r2, vcpu, #VCPU_USR_REG(0)
268 add r2, vcpu, #CP15_OFFSET(c2_TTBR0)
270 add r2, vcpu, #CP15_OFFSET(c2_TTBR1)
314 add r12, vcpu, #CP15_OFFSET(c7_PAR)
333 add r12, vcpu, #CP15_OFFSET(c7_PAR)
379 add r12, vcpu, #CP15_OFFSET(c2_TTBR0)
381 add r12, vcpu, #CP15_OFFSET(c2_TTBR1)
412 add r11, vcpu, #VCPU_VGIC_CPU
453 add r2, r2, #GICH_LR0
454 add r3, r11, #VGIC_V2_CPU_LR
477 add r11, vcpu, #VCPU_VGIC_CPU
492 add r2, r2, #GICH_LR0
493 add r3, r11, #VGIC_V2_CPU_LR
526 add r5, vcpu, r4
568 add r5, vcpu, r4