Lines Matching refs:enable_reg
35 void __iomem *enable_reg; member
56 .enable_reg = EP93XX_SYSCON_DEVCFG,
63 .enable_reg = EP93XX_SYSCON_DEVCFG,
70 .enable_reg = EP93XX_SYSCON_DEVCFG,
91 .enable_reg = EP93XX_SYSCON_PWRCNT,
97 .enable_reg = EP93XX_SYSCON_KEYTCHCLKDIV,
112 .enable_reg = EP93XX_SYSCON_VIDCLKDIV,
119 .enable_reg = EP93XX_SYSCON_I2SCLKDIV,
127 .enable_reg = EP93XX_SYSCON_I2SCLKDIV,
135 .enable_reg = EP93XX_SYSCON_I2SCLKDIV,
143 .enable_reg = EP93XX_SYSCON_PWRCNT,
148 .enable_reg = EP93XX_SYSCON_PWRCNT,
153 .enable_reg = EP93XX_SYSCON_PWRCNT,
158 .enable_reg = EP93XX_SYSCON_PWRCNT,
163 .enable_reg = EP93XX_SYSCON_PWRCNT,
168 .enable_reg = EP93XX_SYSCON_PWRCNT,
173 .enable_reg = EP93XX_SYSCON_PWRCNT,
178 .enable_reg = EP93XX_SYSCON_PWRCNT,
183 .enable_reg = EP93XX_SYSCON_PWRCNT,
188 .enable_reg = EP93XX_SYSCON_PWRCNT,
193 .enable_reg = EP93XX_SYSCON_PWRCNT,
198 .enable_reg = EP93XX_SYSCON_PWRCNT,
245 if (clk->enable_reg) { in __clk_enable()
248 v = __raw_readl(clk->enable_reg); in __clk_enable()
251 ep93xx_syscon_swlocked_write(v, clk->enable_reg); in __clk_enable()
253 __raw_writel(v, clk->enable_reg); in __clk_enable()
276 if (clk->enable_reg) { in __clk_disable()
279 v = __raw_readl(clk->enable_reg); in __clk_disable()
282 ep93xx_syscon_swlocked_write(v, clk->enable_reg); in __clk_disable()
284 __raw_writel(v, clk->enable_reg); in __clk_disable()
331 val = __raw_readl(clk->enable_reg); in set_keytchclk_rate()
349 ep93xx_syscon_swlocked_write(val, clk->enable_reg); in set_keytchclk_rate()
420 val = __raw_readl(clk->enable_reg); in set_div_rate()
427 ep93xx_syscon_swlocked_write(val, clk->enable_reg); in set_div_rate()
433 unsigned val = __raw_readl(clk->enable_reg); in set_i2s_sclk_rate()
437 clk->enable_reg); in set_i2s_sclk_rate()
440 clk->enable_reg); in set_i2s_sclk_rate()
450 unsigned val = __raw_readl(clk->enable_reg) & in set_i2s_lrclk_rate()
455 clk->enable_reg); in set_i2s_lrclk_rate()
458 clk->enable_reg); in set_i2s_lrclk_rate()
461 clk->enable_reg); in set_i2s_lrclk_rate()