81 	u32 val = 0;  in set_cpu_hi3620()  local
94 		val = CPU0_DBG_SRST_REQ_EN | CPU0_NEON_SRST_REQ_EN  in set_cpu_hi3620()
96 		writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS);  in set_cpu_hi3620()
98 		val |= CPU0_HPM_SRST_REQ_EN;  in set_cpu_hi3620()
99 		writel_relaxed(val << cpu, ctrl_base + SCCPURSTEN);  in set_cpu_hi3620()
108 		val = readl_relaxed(ctrl_base + SCPERCTRL0);  in set_cpu_hi3620()
109 		val &= ~(CPU0_WFI_MASK_CFG << cpu);  in set_cpu_hi3620()
110 		writel_relaxed(val, ctrl_base + SCPERCTRL0);  in set_cpu_hi3620()
113 		val = CPU0_DBG_SRST_REQ_EN | CPU0_NEON_SRST_REQ_EN  in set_cpu_hi3620()
115 		writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS);  in set_cpu_hi3620()
118 		val = readl_relaxed(ctrl_base + SCPERCTRL0);  in set_cpu_hi3620()
119 		val |= (CPU0_WFI_MASK_CFG << cpu);  in set_cpu_hi3620()
120 		writel_relaxed(val, ctrl_base + SCPERCTRL0);  in set_cpu_hi3620()
133 		val = CPU0_DBG_SRST_REQ_EN | CPU0_NEON_SRST_REQ_EN  in set_cpu_hi3620()
135 		writel_relaxed(val << cpu, ctrl_base + SCCPURSTEN);  in set_cpu_hi3620()
185 	u32 val = 0;  in hix5hd2_set_cpu()  local
193 		val = readl_relaxed(ctrl_base + HIX5HD2_PERI_PMC0);  in hix5hd2_set_cpu()
194 		val &= ~(PMC0_CPU1_WAIT_MTCOMS_ACK | PMC0_CPU1_POWERDOWN);  in hix5hd2_set_cpu()
195 		val |= PMC0_CPU1_PMC_ENABLE;  in hix5hd2_set_cpu()
196 		writel_relaxed(val, ctrl_base + HIX5HD2_PERI_PMC0);  in hix5hd2_set_cpu()
198 		val = readl_relaxed(ctrl_base + HIX5HD2_PERI_CRG20);  in hix5hd2_set_cpu()
199 		val &= ~CRG20_CPU1_RESET;  in hix5hd2_set_cpu()
200 		writel_relaxed(val, ctrl_base + HIX5HD2_PERI_CRG20);  in hix5hd2_set_cpu()
203 		val = readl_relaxed(ctrl_base + HIX5HD2_PERI_PMC0);  in hix5hd2_set_cpu()
204 		val |= PMC0_CPU1_PMC_ENABLE | PMC0_CPU1_POWERDOWN;  in hix5hd2_set_cpu()
205 		val &= ~PMC0_CPU1_WAIT_MTCOMS_ACK;  in hix5hd2_set_cpu()
206 		writel_relaxed(val, ctrl_base + HIX5HD2_PERI_PMC0);  in hix5hd2_set_cpu()
209 		val = readl_relaxed(ctrl_base + HIX5HD2_PERI_CRG20);  in hix5hd2_set_cpu()
210 		val |= CRG20_CPU1_RESET;  in hix5hd2_set_cpu()
211 		writel_relaxed(val, ctrl_base + HIX5HD2_PERI_CRG20);  in hix5hd2_set_cpu()