Lines Matching refs:clk_register_clkdev
126 clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); in mx31_clocks_init()
127 clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); in mx31_clocks_init()
128 clk_register_clkdev(clk[cspi1_gate], NULL, "imx31-cspi.0"); in mx31_clocks_init()
129 clk_register_clkdev(clk[cspi2_gate], NULL, "imx31-cspi.1"); in mx31_clocks_init()
130 clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2"); in mx31_clocks_init()
131 clk_register_clkdev(clk[pwm_gate], "pwm", NULL); in mx31_clocks_init()
132 clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); in mx31_clocks_init()
133 clk_register_clkdev(clk[rtc_gate], NULL, "imx21-rtc"); in mx31_clocks_init()
134 clk_register_clkdev(clk[epit1_gate], "epit", NULL); in mx31_clocks_init()
135 clk_register_clkdev(clk[epit2_gate], "epit", NULL); in mx31_clocks_init()
136 clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0"); in mx31_clocks_init()
137 clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); in mx31_clocks_init()
138 clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); in mx31_clocks_init()
139 clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); in mx31_clocks_init()
140 clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.0"); in mx31_clocks_init()
141 clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.0"); in mx31_clocks_init()
142 clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0"); in mx31_clocks_init()
143 clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.1"); in mx31_clocks_init()
144 clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.1"); in mx31_clocks_init()
145 clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.1"); in mx31_clocks_init()
146 clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.2"); in mx31_clocks_init()
147 clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.2"); in mx31_clocks_init()
148 clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2"); in mx31_clocks_init()
149 clk_register_clkdev(clk[usb_div_post], "per", "imx-udc-mx27"); in mx31_clocks_init()
150 clk_register_clkdev(clk[usb_gate], "ahb", "imx-udc-mx27"); in mx31_clocks_init()
151 clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27"); in mx31_clocks_init()
152 clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); in mx31_clocks_init()
154 clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0"); in mx31_clocks_init()
155 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0"); in mx31_clocks_init()
156 clk_register_clkdev(clk[uart2_gate], "per", "imx21-uart.1"); in mx31_clocks_init()
157 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.1"); in mx31_clocks_init()
158 clk_register_clkdev(clk[uart3_gate], "per", "imx21-uart.2"); in mx31_clocks_init()
159 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.2"); in mx31_clocks_init()
160 clk_register_clkdev(clk[uart4_gate], "per", "imx21-uart.3"); in mx31_clocks_init()
161 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3"); in mx31_clocks_init()
162 clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4"); in mx31_clocks_init()
163 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4"); in mx31_clocks_init()
164 clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); in mx31_clocks_init()
165 clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); in mx31_clocks_init()
166 clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); in mx31_clocks_init()
167 clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0"); in mx31_clocks_init()
168 clk_register_clkdev(clk[sdhc1_gate], NULL, "imx31-mmc.0"); in mx31_clocks_init()
169 clk_register_clkdev(clk[sdhc2_gate], NULL, "imx31-mmc.1"); in mx31_clocks_init()
170 clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0"); in mx31_clocks_init()
171 clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1"); in mx31_clocks_init()
172 clk_register_clkdev(clk[firi_gate], "firi", NULL); in mx31_clocks_init()
173 clk_register_clkdev(clk[ata_gate], NULL, "pata_imx"); in mx31_clocks_init()
174 clk_register_clkdev(clk[rtic_gate], "rtic", NULL); in mx31_clocks_init()
175 clk_register_clkdev(clk[rng_gate], NULL, "mxc_rnga"); in mx31_clocks_init()
176 clk_register_clkdev(clk[sdma_gate], NULL, "imx31-sdma"); in mx31_clocks_init()
177 clk_register_clkdev(clk[iim_gate], "iim", NULL); in mx31_clocks_init()