37 	dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg,  enumerator
66 	clk[ipg] = imx_clk_divider("ipg", "ahb", base + MXC_CCM_PDR0, 6, 2);  in mx31_clocks_init()
127 	clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");  in mx31_clocks_init()
142 	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");  in mx31_clocks_init()
145 	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.1");  in mx31_clocks_init()
148 	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");  in mx31_clocks_init()
151 	clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");  in mx31_clocks_init()
155 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");  in mx31_clocks_init()
157 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.1");  in mx31_clocks_init()
159 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.2");  in mx31_clocks_init()
161 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3");  in mx31_clocks_init()
163 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4");  in mx31_clocks_init()