54 	ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, ipg,  enumerator
116 	clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2);  in mx35_clocks_init()
214 	clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.0");  in mx35_clocks_init()
217 	clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.1");  in mx35_clocks_init()
220 	clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.2");  in mx35_clocks_init()
225 	clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");  in mx35_clocks_init()
238 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");  in mx35_clocks_init()
240 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.1");  in mx35_clocks_init()
242 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.2");  in mx35_clocks_init()
244 	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");  in mx35_clocks_init()
247 	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.1");  in mx35_clocks_init()
250 	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");  in mx35_clocks_init()
253 	clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");  in mx35_clocks_init()