49 static int clk_pllv3_wait_lock(struct clk_pllv3 *pll)  in clk_pllv3_wait_lock()  argument
52 	u32 val = readl_relaxed(pll->base) & BM_PLL_POWER;  in clk_pllv3_wait_lock()
55 	if ((pll->powerup_set && !val) || (!pll->powerup_set && val))  in clk_pllv3_wait_lock()
60 		if (readl_relaxed(pll->base) & BM_PLL_LOCK)  in clk_pllv3_wait_lock()
67 	return readl_relaxed(pll->base) & BM_PLL_LOCK ? 0 : -ETIMEDOUT;  in clk_pllv3_wait_lock()
72 	struct clk_pllv3 *pll = to_clk_pllv3(hw);  in clk_pllv3_prepare()  local
75 	val = readl_relaxed(pll->base);  in clk_pllv3_prepare()
76 	if (pll->powerup_set)  in clk_pllv3_prepare()
80 	writel_relaxed(val, pll->base);  in clk_pllv3_prepare()
82 	return clk_pllv3_wait_lock(pll);  in clk_pllv3_prepare()
87 	struct clk_pllv3 *pll = to_clk_pllv3(hw);  in clk_pllv3_unprepare()  local
90 	val = readl_relaxed(pll->base);  in clk_pllv3_unprepare()
91 	if (pll->powerup_set)  in clk_pllv3_unprepare()
95 	writel_relaxed(val, pll->base);  in clk_pllv3_unprepare()
101 	struct clk_pllv3 *pll = to_clk_pllv3(hw);  in clk_pllv3_recalc_rate()  local
102 	u32 div = (readl_relaxed(pll->base) >> pll->div_shift)  & pll->div_mask;  in clk_pllv3_recalc_rate()
119 	struct clk_pllv3 *pll = to_clk_pllv3(hw);  in clk_pllv3_set_rate()  local
129 	val = readl_relaxed(pll->base);  in clk_pllv3_set_rate()
130 	val &= ~(pll->div_mask << pll->div_shift);  in clk_pllv3_set_rate()
131 	val |= (div << pll->div_shift);  in clk_pllv3_set_rate()
132 	writel_relaxed(val, pll->base);  in clk_pllv3_set_rate()
134 	return clk_pllv3_wait_lock(pll);  in clk_pllv3_set_rate()
148 	struct clk_pllv3 *pll = to_clk_pllv3(hw);  in clk_pllv3_sys_recalc_rate()  local
149 	u32 div = readl_relaxed(pll->base) & pll->div_mask;  in clk_pllv3_sys_recalc_rate()
174 	struct clk_pllv3 *pll = to_clk_pllv3(hw);  in clk_pllv3_sys_set_rate()  local
183 	val = readl_relaxed(pll->base);  in clk_pllv3_sys_set_rate()
184 	val &= ~pll->div_mask;  in clk_pllv3_sys_set_rate()
186 	writel_relaxed(val, pll->base);  in clk_pllv3_sys_set_rate()
188 	return clk_pllv3_wait_lock(pll);  in clk_pllv3_sys_set_rate()
202 	struct clk_pllv3 *pll = to_clk_pllv3(hw);  in clk_pllv3_av_recalc_rate()  local
203 	u32 mfn = readl_relaxed(pll->base + PLL_NUM_OFFSET);  in clk_pllv3_av_recalc_rate()
204 	u32 mfd = readl_relaxed(pll->base + PLL_DENOM_OFFSET);  in clk_pllv3_av_recalc_rate()
205 	u32 div = readl_relaxed(pll->base) & pll->div_mask;  in clk_pllv3_av_recalc_rate()
237 	struct clk_pllv3 *pll = to_clk_pllv3(hw);  in clk_pllv3_av_set_rate()  local
253 	val = readl_relaxed(pll->base);  in clk_pllv3_av_set_rate()
254 	val &= ~pll->div_mask;  in clk_pllv3_av_set_rate()
256 	writel_relaxed(val, pll->base);  in clk_pllv3_av_set_rate()
257 	writel_relaxed(mfn, pll->base + PLL_NUM_OFFSET);  in clk_pllv3_av_set_rate()
258 	writel_relaxed(mfd, pll->base + PLL_DENOM_OFFSET);  in clk_pllv3_av_set_rate()
260 	return clk_pllv3_wait_lock(pll);  in clk_pllv3_av_set_rate()
287 	struct clk_pllv3 *pll;  in imx_clk_pllv3()  local
292 	pll = kzalloc(sizeof(*pll), GFP_KERNEL);  in imx_clk_pllv3()
293 	if (!pll)  in imx_clk_pllv3()
301 		pll->div_shift = 1;  in imx_clk_pllv3()
304 		pll->powerup_set = true;  in imx_clk_pllv3()
315 	pll->base = base;  in imx_clk_pllv3()
316 	pll->div_mask = div_mask;  in imx_clk_pllv3()
324 	pll->hw.init = &init;  in imx_clk_pllv3()
326 	clk = clk_register(NULL, &pll->hw);  in imx_clk_pllv3()
328 		kfree(pll);  in imx_clk_pllv3()