200 	u32 val = readl_relaxed(ccm_base + CGPR);  in imx6q_set_int_mem_clk_lpm()  local
202 	val &= ~BM_CGPR_INT_MEM_CLK_LPM;  in imx6q_set_int_mem_clk_lpm()
204 		val |= BM_CGPR_INT_MEM_CLK_LPM;  in imx6q_set_int_mem_clk_lpm()
205 	writel_relaxed(val, ccm_base + CGPR);  in imx6q_set_int_mem_clk_lpm()
210 	u32 val;  in imx6_enable_rbc()  local
219 	val = readl_relaxed(ccm_base + CCR);  in imx6_enable_rbc()
220 	val &= ~BM_CCR_RBC_EN;  in imx6_enable_rbc()
221 	val |= enable ? BM_CCR_RBC_EN : 0;  in imx6_enable_rbc()
222 	writel_relaxed(val, ccm_base + CCR);  in imx6_enable_rbc()
225 	val = readl_relaxed(ccm_base + CCR);  in imx6_enable_rbc()
226 	val &= ~BM_CCR_RBC_BYPASS_COUNT;  in imx6_enable_rbc()
227 	val |= enable ? BM_CCR_RBC_BYPASS_COUNT : 0;  in imx6_enable_rbc()
228 	writel(val, ccm_base + CCR);  in imx6_enable_rbc()
243 	u32 val;  in imx6q_enable_wb()  local
246 	val = readl_relaxed(ccm_base + CLPCR);  in imx6q_enable_wb()
247 	val &= ~BM_CLPCR_WB_PER_AT_LPM;  in imx6q_enable_wb()
248 	val |= enable ? BM_CLPCR_WB_PER_AT_LPM : 0;  in imx6q_enable_wb()
249 	writel_relaxed(val, ccm_base + CLPCR);  in imx6q_enable_wb()
252 	val = readl_relaxed(ccm_base + CCR);  in imx6q_enable_wb()
253 	val &= ~BM_CCR_WB_COUNT;  in imx6q_enable_wb()
254 	val |= enable ? BM_CCR_WB_COUNT : 0;  in imx6q_enable_wb()
255 	writel_relaxed(val, ccm_base + CCR);  in imx6q_enable_wb()
260 	u32 val = readl_relaxed(ccm_base + CLPCR);  in imx6q_set_lpm()  local
262 	val &= ~BM_CLPCR_LPM;  in imx6q_set_lpm()
267 		val |= 0x1 << BP_CLPCR_LPM;  in imx6q_set_lpm()
268 		val |= BM_CLPCR_ARM_CLK_DIS_ON_LPM;  in imx6q_set_lpm()
271 		val |= 0x2 << BP_CLPCR_LPM;  in imx6q_set_lpm()
272 		val &= ~BM_CLPCR_VSTBY;  in imx6q_set_lpm()
273 		val &= ~BM_CLPCR_SBYOS;  in imx6q_set_lpm()
275 			val |= BM_CLPCR_BYPASS_PMIC_READY;  in imx6q_set_lpm()
277 			val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;  in imx6q_set_lpm()
279 			val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;  in imx6q_set_lpm()
282 		val |= 0x1 << BP_CLPCR_LPM;  in imx6q_set_lpm()
283 		val &= ~BM_CLPCR_VSTBY;  in imx6q_set_lpm()
284 		val &= ~BM_CLPCR_SBYOS;  in imx6q_set_lpm()
287 		val |= 0x2 << BP_CLPCR_LPM;  in imx6q_set_lpm()
288 		val |= 0x3 << BP_CLPCR_STBY_COUNT;  in imx6q_set_lpm()
289 		val |= BM_CLPCR_VSTBY;  in imx6q_set_lpm()
290 		val |= BM_CLPCR_SBYOS;  in imx6q_set_lpm()
292 			val |= BM_CLPCR_BYPASS_PMIC_READY;  in imx6q_set_lpm()
294 			val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;  in imx6q_set_lpm()
296 			val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;  in imx6q_set_lpm()
317 	writel_relaxed(val, ccm_base + CLPCR);  in imx6q_set_lpm()
323 static int imx6q_suspend_finish(unsigned long val)  in imx6q_suspend_finish()  argument