Lines Matching refs:str
92 str \rd, [\base, #EMC_TIMING_CONTROL]
108 str \rd, [\r_car_base, #\pll_misc]
112 str \rd, [\r_car_base, #\pll_misc]
126 str \rd, [\car, #\iddq]
132 str \rd, [\car, #\iddq]
187 str r12, [r1]
196 str r3, [r1] @ clear CSR
213 str r3, [r2]
330 str r1, [r0, #CLK_RESET_SCLK_BURST]
331 str r1, [r0, #CLK_RESET_CCLK_BURST]
333 str r1, [r0, #CLK_RESET_CCLK_DIVIDER]
334 str r1, [r0, #CLK_RESET_SCLK_DIVIDER]
353 str r1, [r2, #PMC_PLLP_WB0_OVERRIDE]
366 str r1, [r2, #PMC_PLLP_WB0_OVERRIDE]
390 str r4, [r0, #CLK_RESET_CLK_SOURCE_MSELECT]
393 str r4, [r0, #CLK_RESET_SCLK_BURST]
400 str r4, [r0, #CLK_RESET_CCLK_BURST]
407 str r1, [r2, #PMC_IO_DPD_REQ] @ DPD_OFF
421 str r1, [r0, #EMC_XM2VTTGENPADCTRL]
423 str r1, [r0, #EMC_XM2VTTGENPADCTRL2]
425 str r1, [r0, #EMC_AUTO_CAL_INTERVAL]
430 str r1, [r0, #EMC_CFG_DIG_DLL]
442 str r1, [r0, #EMC_AUTO_CAL_CONFIG]
451 str r1, [r0, #EMC_CFG]
454 str r1, [r0, #EMC_SELF_REF] @ take DRAM out of self refresh
479 str r2, [r0, #EMC_ZQ_CAL]
489 str r2, [r0, #EMC_ZQ_CAL]
498 str r2, [r0, #EMC_MRW]
508 str r2, [r0, #EMC_MRW]
515 str r1, [r0, #EMC_REQ_CTRL]
517 str r1, [r0, #EMC_ZCAL_INTERVAL]
519 str r1, [r0, #EMC_CFG]
615 str r0, [r5, #CLK_RESET_SCLK_BURST]
620 str r0, [r5, #CLK_RESET_CCLK_BURST]
622 str r0, [r5, #CLK_RESET_CCLK_DIVIDER]
623 str r0, [r5, #CLK_RESET_SCLK_DIVIDER]
628 str r0, [r5, #CLK_RESET_CLK_SOURCE_MSELECT]
638 str r0, [r4, #PMC_PLLP_WB0_OVERRIDE]
643 str r0, [r5, #CLK_RESET_PLLP_BASE]
646 str r0, [r5, #CLK_RESET_PLLA_BASE]
649 str r0, [r5, #CLK_RESET_PLLC_BASE]
652 str r0, [r5, #CLK_RESET_PLLX_BASE]
661 str r0, [r5, #CLK_RESET_SCLK_BURST]
680 str r0, [r6, r2]
689 str r0, [r6, r2]
732 str r1, [r8, r9] @ save the content of the addr
751 str r1, [r0, #EMC_ZCAL_INTERVAL]
752 str r1, [r0, #EMC_AUTO_CAL_INTERVAL]
756 str r1, [r0, #EMC_CFG] @ disable DYN_SELF_REF
770 str r1, [r0, #EMC_REQ_CTRL] @ stall incoming DRAM requests
778 str r1, [r0, #EMC_SELF_REF]
792 str r1, [r0, #EMC_XM2VTTGENPADCTRL]
797 str r1, [r0, #EMC_XM2VTTGENPADCTRL2]
818 str r1, [r4, #PMC_IO_DPD_REQ]