Lines Matching refs:r7
31 and r7, r8, #15 << 24
32 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine
59 mov r7, #0x11
60 orr r7, r7, #0x1100
61 and r6, r8, r7
62 and r9, r8, r7, lsl #1
64 and r9, r8, r7, lsl #2
66 and r9, r8, r7, lsl #3
72 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
74 subne r7, r7, r6, lsl #2 @ Undo increment
75 addeq r7, r7, r6, lsl #2 @ Undo decrement
76 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
90 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
92 subne r7, r7, r6 @ Undo incrmenet
93 addeq r7, r7, r6 @ Undo decrement
94 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
104 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
106 subne r7, r7, r6, lsr #20 @ Undo increment
107 addeq r7, r7, r6, lsr #20 @ Undo decrement
108 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
115 and r7, r8, #15 @ Extract 'm' from instruction
116 ldr r6, [r2, r7, lsl #2] @ Get register 'Rm'
119 and r7, r8, #0x70 @ get shift type
120 orreq r7, r7, #8 @ shift count = 0
121 add pc, pc, r7
160 and r7, r8, #15 << 12
161 add pc, pc, r7, lsr #10 @ lookup in table
197 movs r7, r8, lsr #9 @ C = r8 bit 8 (R bit)
200 ldr r7, [r2, #13 << 2]
202 addeq r7, r7, r6, lsl #2 @ increment SP if PUSH
203 subne r7, r7, r6, lsl #2 @ decrement SP if POP
204 str r7, [r2, #13 << 2]
216 ldr r7, [r2, r9, lsr #6]
218 sub r7, r7, r6, lsl #2 @ always decrement
219 str r7, [r2, r9, lsr #6]