Lines Matching refs:c7
75 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
76 mcr p15, 0, ip, c7, c10, 4 @ drain WB
77 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
94 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
95 mcr p15, 0, r0, c7, c0, 4 @ wait for interrupt
105 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
127 mcr p15, 0, ip, c7, c14, 0 @ clean & invalidate all D cache
129 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
130 mcrne p15, 0, ip, c7, c10, 0 @ drain write buffer
151 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
152 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
154 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
155 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
160 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
190 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
191 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
195 mcr p15, 0, r0, c7, c10, 4 @ drain WB
210 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
215 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
216 mcr p15, 0, r0, c7, c10, 4 @ drain WB
234 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
236 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
238 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
242 mcr p15, 0, r0, c7, c10, 4 @ drain WB
257 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
261 mcr p15, 0, r0, c7, c10, 4 @ drain WB
275 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
279 mcr p15, 0, r0, c7, c10, 4 @ drain WB
313 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
317 mcr p15, 0, r0, c7, c10, 4 @ drain WB
330 mcr p15, 0, ip, c7, c14, 0 @ clean & invalidate all D cache
331 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
332 mcr p15, 0, ip, c7, c10, 4 @ drain WB
335 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
347 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
348 mcr p15, 0, r0, c7, c10, 4 @ drain WB
370 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB
371 mcr p15, 0, ip, c7, c10, 4 @ drain write (&fill) buffer
372 mcr p15, 0, ip, c7, c5, 4 @ flush prefetch buffer
373 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
389 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches
390 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
391 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs