Lines Matching refs:clock

97 		clock-frequency = <50000000>;
112 				compatible = "fixed-clock";
113 				#clock-cells = <1>;
114 				clock-frequency = <100000000>;
115 				clock-output-names = "refclk";
119 				compatible = "apm,xgene-pcppll-clock";
120 				#clock-cells = <1>;
122 				clock-names = "pcppll";
124 				clock-output-names = "pcppll";
129 				compatible = "apm,xgene-socpll-clock";
130 				#clock-cells = <1>;
132 				clock-names = "socpll";
134 				clock-output-names = "socpll";
139 				compatible = "fixed-factor-clock";
140 				#clock-cells = <1>;
142 				clock-names = "socplldiv2";
143 				clock-mult = <1>;
144 				clock-div = <2>;
145 				clock-output-names = "socplldiv2";
149 				compatible = "apm,xgene-device-clock";
150 				#clock-cells = <1>;
152 				clock-names = "qmlclk";
155 				clock-output-names = "qmlclk";
159 				compatible = "apm,xgene-device-clock";
160 				#clock-cells = <1>;
162 				clock-names = "ethclk";
168 				clock-output-names = "ethclk";
172 				compatible = "apm,xgene-device-clock";
173 				#clock-cells = <1>;
177 				clock-output-names = "menetclk";
181 				compatible = "apm,xgene-device-clock";
182 				#clock-cells = <1>;
187 				clock-output-names = "sge0clk";
191 				compatible = "apm,xgene-device-clock";
192 				#clock-cells = <1>;
197 				clock-output-names = "sge1clk";
201 				compatible = "apm,xgene-device-clock";
202 				#clock-cells = <1>;
207 				clock-output-names = "xge0clk";
211 				compatible = "apm,xgene-device-clock";
212 				#clock-cells = <1>;
216 				clock-output-names = "sataphy1clk";
225 				compatible = "apm,xgene-device-clock";
226 				#clock-cells = <1>;
230 				clock-output-names = "sataphy2clk";
239 				compatible = "apm,xgene-device-clock";
240 				#clock-cells = <1>;
244 				clock-output-names = "sataphy3clk";
253 				compatible = "apm,xgene-device-clock";
254 				#clock-cells = <1>;
258 				clock-output-names = "sata01clk";
266 				compatible = "apm,xgene-device-clock";
267 				#clock-cells = <1>;
271 				clock-output-names = "sata23clk";
279 				compatible = "apm,xgene-device-clock";
280 				#clock-cells = <1>;
284 				clock-output-names = "sata45clk";
292 				compatible = "apm,xgene-device-clock";
293 				#clock-cells = <1>;
301 				clock-output-names = "rtcclk";
305 				compatible = "apm,xgene-device-clock";
306 				#clock-cells = <1>;
314 				clock-output-names = "rngpkaclk";
319 				compatible = "apm,xgene-device-clock";
320 				#clock-cells = <1>;
324 				clock-output-names = "pcie0clk";
329 				compatible = "apm,xgene-device-clock";
330 				#clock-cells = <1>;
334 				clock-output-names = "pcie1clk";
339 				compatible = "apm,xgene-device-clock";
340 				#clock-cells = <1>;
344 				clock-output-names = "pcie2clk";
349 				compatible = "apm,xgene-device-clock";
350 				#clock-cells = <1>;
354 				clock-output-names = "pcie3clk";
359 				compatible = "apm,xgene-device-clock";
360 				#clock-cells = <1>;
364 				clock-output-names = "pcie4clk";
368 				compatible = "apm,xgene-device-clock";
369 				#clock-cells = <1>;
373 				clock-output-names = "dmaclk";
498 			clock-frequency = <10000000>; /* Updated by bootloader */
509 			clock-frequency = <10000000>; /* Updated by bootloader */
520 			clock-frequency = <10000000>; /* Updated by bootloader */
531 			clock-frequency = <10000000>; /* Updated by bootloader */
614 			#clock-cells = <1>;