Lines Matching refs:x0
25 reg = <0x0 0x000>;
32 reg = <0x0 0x001>;
39 reg = <0x0 0x100>;
46 reg = <0x0 0x101>;
53 reg = <0x0 0x200>;
60 reg = <0x0 0x201>;
67 reg = <0x0 0x300>;
74 reg = <0x0 0x301>;
84 reg = <0x0 0x78010000 0x0 0x1000>, /* GIC Dist */
85 <0x0 0x78020000 0x0 0x1000>, /* GIC CPU */
86 <0x0 0x78040000 0x0 0x2000>, /* GIC VCPU Control */
87 <0x0 0x78060000 0x0 0x2000>; /* GIC VCPU */
105 dma-ranges = <0x0 0x0 0x0 0x0 0x400 0x0>;
123 reg = <0x0 0x17000100 0x0 0x1000>;
133 reg = <0x0 0x17000120 0x0 0x1000>;
153 reg = <0x0 0x1703C000 0x0 0x1000>;
163 reg = <0x0 0x17000000 0x0 0x1000>;
167 divider-shift = <0x0>;
175 reg = <0x0 0x1702C000 0x0 0x1000>;
184 reg = <0x0 0x1f21c000 0x0 0x1000>;
194 reg = <0x0 0x1f21c000 0x0 0x1000>;
204 reg = <0x0 0x1f61c000 0x0 0x1000>;
214 reg = <0x0 0x1f21c000 0x0 0x1000>;
220 enable-offset = <0x0>;
228 reg = <0x0 0x1f22c000 0x0 0x1000>;
234 enable-offset = <0x0>;
242 reg = <0x0 0x1f23c000 0x0 0x1000>;
248 enable-offset = <0x0>;
256 reg = <0x0 0x1f21c000 0x0 0x1000>;
261 enable-offset = <0x0>;
269 reg = <0x0 0x1f22c000 0x0 0x1000>;
274 enable-offset = <0x0>;
282 reg = <0x0 0x1f23c000 0x0 0x1000>;
287 enable-offset = <0x0>;
295 reg = <0x0 0x17000000 0x0 0x2000>;
308 reg = <0x0 0x17000000 0x0 0x2000>;
322 reg = <0x0 0x1f2bc000 0x0 0x1000>;
332 reg = <0x0 0x1f2cc000 0x0 0x1000>;
342 reg = <0x0 0x1f2dc000 0x0 0x1000>;
352 reg = <0x0 0x1f50c000 0x0 0x1000>;
362 reg = <0x0 0x1f51c000 0x0 0x1000>;
371 reg = <0x0 0x1f27c000 0x0 0x1000>;
384 reg = < 0x00 0x1f2b0000 0x0 0x00010000 /* Controller registers */
385 0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */
391 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
392 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
393 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
394 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
395 0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
407 reg = < 0x00 0x1f2c0000 0x0 0x00010000 /* Controller registers */
408 0xd0 0xd0000000 0x0 0x00040000>; /* PCI config space */
410 ranges = <0x01000000 0x0 0x00000000 0xd0 0x10000000 0x00 0x00010000 /* io */
411 0x02000000 0x0 0x80000000 0xd1 0x80000000 0x00 0x80000000>; /* mem */
414 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
415 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc8 0x1
416 0x0 0x0 0x0 0x2 &gic 0x0 0xc9 0x1
417 0x0 0x0 0x0 0x3 &gic 0x0 0xca 0x1
418 0x0 0x0 0x0 0x4 &gic 0x0 0xcb 0x1>;
430 reg = < 0x00 0x1f2d0000 0x0 0x00010000 /* Controller registers */
431 0x90 0xd0000000 0x0 0x00040000>; /* PCI config space */
433 ranges = <0x01000000 0x0 0x00000000 0x90 0x10000000 0x0 0x00010000 /* io */
434 0x02000000 0x0 0x80000000 0x91 0x80000000 0x0 0x80000000>; /* mem */
437 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
438 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xce 0x1
439 0x0 0x0 0x0 0x2 &gic 0x0 0xcf 0x1
440 0x0 0x0 0x0 0x3 &gic 0x0 0xd0 0x1
441 0x0 0x0 0x0 0x4 &gic 0x0 0xd1 0x1>;
453 reg = < 0x00 0x1f500000 0x0 0x00010000 /* Controller registers */
454 0xa0 0xd0000000 0x0 0x00040000>; /* PCI config space */
456 ranges = <0x01000000 0x0 0x00000000 0xa0 0x10000000 0x0 0x00010000 /* io */
457 0x02000000 0x0 0x80000000 0xa1 0x80000000 0x0 0x80000000>; /* mem */
460 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
461 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xd4 0x1
462 0x0 0x0 0x0 0x2 &gic 0x0 0xd5 0x1
463 0x0 0x0 0x0 0x3 &gic 0x0 0xd6 0x1
464 0x0 0x0 0x0 0x4 &gic 0x0 0xd7 0x1>;
476 reg = < 0x00 0x1f510000 0x0 0x00010000 /* Controller registers */
477 0xc0 0xd0000000 0x0 0x00200000>; /* PCI config space */
479 ranges = <0x01000000 0x0 0x00000000 0xc0 0x10000000 0x0 0x00010000 /* io */
480 0x02000000 0x0 0x80000000 0xc1 0x80000000 0x0 0x80000000>; /* mem */
483 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
484 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xda 0x1
485 0x0 0x0 0x0 0x2 &gic 0x0 0xdb 0x1
486 0x0 0x0 0x0 0x3 &gic 0x0 0xdc 0x1
487 0x0 0x0 0x0 0x4 &gic 0x0 0xdd 0x1>;
496 reg = <0 0x1c020000 0x0 0x1000>;
500 interrupts = <0x0 0x4c 0x4>;
507 reg = <0 0x1c021000 0x0 0x1000>;
511 interrupts = <0x0 0x4d 0x4>;
518 reg = <0 0x1c022000 0x0 0x1000>;
522 interrupts = <0x0 0x4e 0x4>;
529 reg = <0 0x1c023000 0x0 0x1000>;
533 interrupts = <0x0 0x4f 0x4>;
538 reg = <0x0 0x1f21a000 0x0 0x100>;
548 reg = <0x0 0x1f22a000 0x0 0x100>;
558 reg = <0x0 0x1f23a000 0x0 0x100>;
568 reg = <0x0 0x1a000000 0x0 0x1000>,
569 <0x0 0x1f210000 0x0 0x1000>,
570 <0x0 0x1f21d000 0x0 0x1000>,
571 <0x0 0x1f21e000 0x0 0x1000>,
572 <0x0 0x1f217000 0x0 0x1000>;
573 interrupts = <0x0 0x86 0x4>;
583 reg = <0x0 0x1a400000 0x0 0x1000>,
584 <0x0 0x1f220000 0x0 0x1000>,
585 <0x0 0x1f22d000 0x0 0x1000>,
586 <0x0 0x1f22e000 0x0 0x1000>,
587 <0x0 0x1f227000 0x0 0x1000>;
588 interrupts = <0x0 0x87 0x4>;
598 reg = <0x0 0x1a800000 0x0 0x1000>,
599 <0x0 0x1f230000 0x0 0x1000>,
600 <0x0 0x1f23d000 0x0 0x1000>,
601 <0x0 0x1f23e000 0x0 0x1000>;
602 interrupts = <0x0 0x88 0x4>;
612 reg = <0x0 0x10510000 0x0 0x400>;
613 interrupts = <0x0 0x46 0x4>;
621 reg = <0x0 0x17020000 0x0 0xd100>,
622 <0x0 0X17030000 0x0 0Xc300>,
623 <0x0 0X10000000 0x0 0X200>;
625 interrupts = <0x0 0x3c 0x4>;
647 reg = <0x0 0x1f210000 0x0 0xd100>,
648 <0x0 0x1f200000 0x0 0Xc300>,
649 <0x0 0x1B000000 0x0 0X200>;
651 interrupts = <0x0 0xA0 0x4>,
652 <0x0 0xA1 0x4>;
662 reg = <0x0 0x1f210030 0x0 0xd100>,
663 <0x0 0x1f200000 0x0 0Xc300>,
664 <0x0 0x1B000000 0x0 0X8000>;
666 interrupts = <0x0 0xAC 0x4>,
667 <0x0 0xAD 0x4>;
678 reg = <0x0 0x1f610000 0x0 0xd100>,
679 <0x0 0x1f600000 0x0 0Xc300>,
680 <0x0 0x18000000 0x0 0X200>;
682 interrupts = <0x0 0x60 0x4>,
683 <0x0 0x61 0x4>;
693 reg = <0x0 0x10520000 0x0 0x100>;
694 interrupts = <0x0 0x41 0x4>;
701 reg = <0x0 0x1f270000 0x0 0x10000>,
702 <0x0 0x1f200000 0x0 0x10000>,
703 <0x0 0x1b008000 0x0 0x2000>,
704 <0x0 0x1054a000 0x0 0x100>;
705 interrupts = <0x0 0x82 0x4>,
706 <0x0 0xb8 0x4>,
707 <0x0 0xb9 0x4>,
708 <0x0 0xba 0x4>,
709 <0x0 0xbb 0x4>;