36 void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)  in arch_timer_reg_write_cp15()  argument
41 			asm volatile("msr cntp_ctl_el0,  %0" : : "r" (val));  in arch_timer_reg_write_cp15()
44 			asm volatile("msr cntp_tval_el0, %0" : : "r" (val));  in arch_timer_reg_write_cp15()
50 			asm volatile("msr cntv_ctl_el0,  %0" : : "r" (val));  in arch_timer_reg_write_cp15()
53 			asm volatile("msr cntv_tval_el0, %0" : : "r" (val));  in arch_timer_reg_write_cp15()
64 	u32 val;  in arch_timer_reg_read_cp15()  local
69 			asm volatile("mrs %0,  cntp_ctl_el0" : "=r" (val));  in arch_timer_reg_read_cp15()
72 			asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));  in arch_timer_reg_read_cp15()
78 			asm volatile("mrs %0,  cntv_ctl_el0" : "=r" (val));  in arch_timer_reg_read_cp15()
81 			asm volatile("mrs %0, cntv_tval_el0" : "=r" (val));  in arch_timer_reg_read_cp15()
86 	return val;  in arch_timer_reg_read_cp15()
91 	u32 val;  in arch_timer_get_cntfrq()  local
92 	asm volatile("mrs %0,   cntfrq_el0" : "=r" (val));  in arch_timer_get_cntfrq()
93 	return val;  in arch_timer_get_cntfrq()