Lines Matching refs:x0
259 mov x21, x0 // x21=FDT
261 adr_l x0, boot_args // record the contents of
262 stp x21, x1, [x0] // x0 .. x3 at kernel entry
263 stp x2, x3, [x0, #16]
268 add x1, x0, #0x20 // 4 x 8 bytes
281 mov x0, #(1 << 29)
282 add x0, x0, x24
283 cmp x21, x0
363 mov x0, x25
370 mov x0, x25
372 1: stp xzr, xzr, [x0], #16
373 stp xzr, xzr, [x0], #16
374 stp xzr, xzr, [x0], #16
375 stp xzr, xzr, [x0], #16
376 cmp x0, x6
384 mov x0, x25 // idmap_pg_dir
422 create_table_entry x0, x3, EXTRA_SHIFT, EXTRA_PTRS, x5, x6
426 create_pgd_entry x0, x3, x5, x6
429 create_block_map x0, x7, x3, x5, x6
434 mov x0, x26 // swapper_pg_dir
436 create_pgd_entry x0, x5, x3, x6
439 create_block_map x0, x7, x3, x5, x6
455 create_block_map x0, x7, x3, x5, x6
462 mov x0, x25
505 mrs x0, CurrentEL
506 cmp x0, #CurrentEL_EL2
508 mrs x0, sctlr_el2
509 CPU_BE( orr x0, x0, #(1 << 25) ) // Set the EE bit for EL2
510 CPU_LE( bic x0, x0, #(1 << 25) ) // Clear the EE bit for EL2
511 msr sctlr_el2, x0
513 1: mrs x0, sctlr_el1
514 CPU_BE( orr x0, x0, #(3 << 24) ) // Set the EE and E0E bits for EL1
515 CPU_LE( bic x0, x0, #(3 << 24) ) // Clear the EE and E0E bits for EL1
516 msr sctlr_el1, x0
522 2: mov x0, #(1 << 31) // 64-bit EL1
523 msr hcr_el2, x0
526 mrs x0, cnthctl_el2
527 orr x0, x0, #3 // Enable EL1 physical timers
528 msr cnthctl_el2, x0
533 mrs x0, id_aa64pfr0_el1
534 ubfx x0, x0, #24, #4
535 cmp x0, #1
538 mrs_s x0, ICC_SRE_EL2
539 orr x0, x0, #ICC_SRE_EL2_SRE // Set ICC_SRE_EL2.SRE==1
540 orr x0, x0, #ICC_SRE_EL2_ENABLE // Set ICC_SRE_EL2.Enable==1
541 msr_s ICC_SRE_EL2, x0
549 mrs x0, midr_el1
551 msr vpidr_el2, x0
555 mov x0, #0x0800 // Set/clear RES{1,0} bits
556 CPU_BE( movk x0, #0x33d0, lsl #16 ) // Set EE and E0E on BE systems
557 CPU_LE( movk x0, #0x30d0, lsl #16 ) // Clear EE and E0E on LE systems
558 msr sctlr_el1, x0
561 mov x0, #0x33ff
562 msr cptr_el2, x0 // Disable copro. traps to EL2
569 mrs x0, id_aa64dfr0_el1 // Check ID_AA64DFR0_EL1 PMUVer
570 sbfx x0, x0, #8, #4
571 cmp x0, #1
573 mrs x0, pmcr_el0 // Disable debug access traps
574 ubfx x0, x0, #11, #5 // to EL2 and allow access to
575 msr mdcr_el2, x0 // all PMU counters from EL1
582 adrp x0, __hyp_stub_vectors
583 add x0, x0, #:lo12:__hyp_stub_vectors
584 msr vbar_el2, x0
587 mov x0, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\
589 msr spsr_el2, x0
632 mrs x0, mpidr_el1
634 and x0, x0, x1
637 cmp x4, x0
667 ldr x0, [x21] // get secondary_data.stack
668 mov sp, x0
688 msr sctlr_el1, x0