Lines Matching refs:AARCH64_INSN_SF_BIT
35 #define AARCH64_INSN_SF_BIT BIT(31) macro
523 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_comp_branch_imm()
657 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_load_store_pair()
706 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_add_sub_imm()
751 insn |= AARCH64_INSN_SF_BIT | AARCH64_INSN_N_BIT; in aarch64_insn_gen_bitfield()
800 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_movewide()
848 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_add_sub_shifted_reg()
893 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_data1()
941 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_data2()
980 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_data3()
1042 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_logical_shifted_reg()