Lines Matching refs:str
57 str w4, [x3, #VGIC_V3_CPU_HCR]
58 str w5, [x3, #VGIC_V3_CPU_VMCR]
59 str w6, [x3, #VGIC_V3_CPU_MISR]
60 str w7, [x3, #VGIC_V3_CPU_EISR]
61 str w8, [x3, #VGIC_V3_CPU_ELRSR]
96 str x20, [x3, #LR_OFFSET(15)]
97 str x19, [x3, #LR_OFFSET(14)]
98 str x18, [x3, #LR_OFFSET(13)]
99 str x17, [x3, #LR_OFFSET(12)]
100 str x16, [x3, #LR_OFFSET(11)]
101 str x15, [x3, #LR_OFFSET(10)]
102 str x14, [x3, #LR_OFFSET(9)]
103 str x13, [x3, #LR_OFFSET(8)]
104 str x12, [x3, #LR_OFFSET(7)]
105 str x11, [x3, #LR_OFFSET(6)]
106 str x10, [x3, #LR_OFFSET(5)]
107 str x9, [x3, #LR_OFFSET(4)]
108 str x8, [x3, #LR_OFFSET(3)]
109 str x7, [x3, #LR_OFFSET(2)]
110 str x6, [x3, #LR_OFFSET(1)]
111 str x5, [x3, #LR_OFFSET(0)]
117 str w20, [x3, #(VGIC_V3_CPU_AP0R + 3*4)]
119 str w19, [x3, #(VGIC_V3_CPU_AP0R + 2*4)]
121 str w18, [x3, #(VGIC_V3_CPU_AP0R + 1*4)]
123 str w17, [x3, #VGIC_V3_CPU_AP0R]
129 str w20, [x3, #(VGIC_V3_CPU_AP1R + 3*4)]
131 str w19, [x3, #(VGIC_V3_CPU_AP1R + 2*4)]
133 str w18, [x3, #(VGIC_V3_CPU_AP1R + 1*4)]
135 str w17, [x3, #VGIC_V3_CPU_AP1R]