Lines Matching refs:mov
72 # define DBG_FAULT(i) mov r16=ar.k2;; shl r16=r16,8;; add r16=(i),r16;;mov ar.k2=r16
80 mov r31=pr; \
81 mov r19=n;; /* prepare to save predicates */ \
118 mov r31=pr // save the predicate registers
119 mov r19=IA64_KR(PT_BASE) // get page table base address
234 mov r27=PAGE_SHIFT<<2
242 mov pr=r31,-1 // restore predicate registers
258 mov r29=b0 // save b0
259 mov r31=pr // save predicates
266 mov b0=r29
280 mov r20=PAGE_SHIFT<<2 // setup page size for purge
286 mov pr=r31,-1
302 mov r29=b0 // save b0
303 mov r31=pr // save predicates
310 mov b0=r29
324 mov r20=PAGE_SHIFT<<2 // setup page size for purge
330 mov pr=r31,-1
343 mov r31=pr
353 (p8) mov r29=b0 // save b0
368 mov pr=r31,-1
382 mov r31=pr
383 mov r24=PERCPU_ADDR
393 (p8) mov r29=b0 // save b0
398 mov r25=PERCPU_PAGE_SHIFT << 2
399 mov r26=PERCPU_PAGE_SIZE
403 (p10) mov r19=IA64_KR(PER_CPU_DATA)
423 mov pr=r31,-1
454 mov r19=IA64_KR(PT_BASE) // get the page table base address
504 mov b0=r30
542 mov r29=b0 // save b0 in case of nested fault
543 mov r31=pr // save pr
545 mov r28=ar.ccv // save ar.ccv
549 mov ar.ccv=r18 // set compare value for cmpxchg
554 mov r24=PAGE_SHIFT<<2
571 mov b0=r29 // restore b0
572 mov ar.ccv=r28
578 mov b0=r29 // restore b0
583 mov pr=r31,-1 // restore pr
595 mov r31=pr // save predicates
605 (p6) mov r16=r18 // if so, use cr.iip instead of cr.ifa
609 mov r29=b0 // save b0 in case of nested fault)
611 mov r28=ar.ccv // save ar.ccv
615 mov ar.ccv=r18 // set compare value for cmpxchg
620 mov r24=PAGE_SHIFT<<2
637 mov b0=r29 // restore b0
638 mov ar.ccv=r28
644 mov b0=r29 // restore b0
649 mov pr=r31,-1
663 mov r31=pr
664 mov r29=b0 // save b0 in case of nested fault)
666 mov r28=ar.ccv // save ar.ccv
670 mov ar.ccv=r18 // set compare value for cmpxchg
675 mov r24=PAGE_SHIFT<<2
691 mov ar.ccv=r28
701 mov b0=r29 // restore b0
702 mov pr=r31,-1
726 mov.m r16=IA64_KR(CURRENT) // M2 r16 <- current task (12 cyc)
728 mov r31=pr // I0 (2 cyc)
731 mov.m r27=ar.rsc // M2 (12 cyc)
732 mov r18=__IA64_BREAK_SYSCALL // A
734 mov.m ar.rsc=0 // M2
735 mov.m r21=ar.fpsr // M2 (12 cyc)
736 mov r19=b6 // I0 (2 cyc)
738 mov.m r23=ar.bspstore // M2 (12 cyc)
739 mov.m r24=ar.rnat // M2 (5 cyc)
740 mov.i r26=ar.pfs // I0 (2 cyc)
744 mov r20=r1 // A save r1
757 mov r1=r16 // A move task-pointer to "addl"-addressable reg
758 mov r2=r16 // A setup r2 for ia64_syscall_setup
763 mov r3=NR_syscalls - 1
778 mov.m ar.bspstore=r22 // M2 switch to kernel RBS
782 (p8) mov r8=0 // A clear ei to 0
789 mov b6=r30 // I0 setup syscall handler branch reg early
795 mov.m r25=ar.unat // M2 (5 cyc)
807 mov b6=r30 // I0 setup syscall handler branch reg early
812 mov r18=ar.bsp // M2 (12 cyc)
844 mov ar.rsc=0x3 // M2 set eager mode, pl 0, LE, loadrs=0
853 mov rp=r3 // I0 set the real return addr
866 mov ar.rnat=r24 // M2 restore kernel's AR.RNAT
868 mov ar.bspstore=r23 // M2 restore kernel's AR.BSPSTORE
955 (pKStk) mov r18=r0 // make sure r18 isn't NaT
960 mov r28=b0 // save b0 (2 cyc)
965 (p8) mov in0=-1
974 (p9) mov in1=-1
985 (p10) mov in2=-1
987 (p11) mov in3=-1
999 (p12) mov in4=-1
1004 (p13) mov in5=-1
1010 mov r8=1
1018 mov r13=r2 // establish `current'
1022 (p13) mov in6=-1
1023 (p8) mov in7=-1
1028 mov.m ar.fpsr=r17 // set ar.fpsr to kernel default value
1029 (p10) mov r8=-EINVAL
1114 mov r17=PAGE_SHIFT<<2
1118 mov r31=pr
1130 mov r31=pr
1143 mov r31=pr
1156 mov r31=pr
1168 mov r31=pr
1173 mov r19=24 // fault number
1185 mov r31=pr
1186 mov r19=25
1198 mov r31=pr // save PR
1208 mov pr=r31,-1
1212 1: mov pr=r31,-1
1273 mov r31=pr // prepare to save predicates
1533 mov rp=r14
1540 mov ar.rsc=r27 // restore ar.rsc before SAVE_MIN_WITH_COVER
1560 mov rp=r15
1567 mov r31=pr // prepare to save predicates
1584 mov rp=r14
1610 mov rp=r14
1637 mov out0=r15
1645 mov rp=r14
1669 mov out0=ar.ec
1677 mov out0=r9
1678 mov out1=r10
1679 mov out2=r11
1682 mov rp=r15
1683 mov b6=r8