Lines Matching refs:result1
130 .rotr word1[4], word2[4],result1[LOAD_LATENCY+2],result2[LOAD_LATENCY+2]
183 (p8) mov result1[0]=word1[0]
184 (p9) add result1[0]=word1[0],word2[0]
186 cmp.ltu p6,p0=result1[0],word1[0] // check the carry
189 (p6) adds result1[0]=1,result1[0]
198 add result1[0]=result1[0],word1[1]
200 cmp.ltu p6,p0=result1[0],word1[1]
202 (p6) adds result1[0]=1,result1[0]
226 (ELD_1) cmp.ltu pC1[0],p0=result1[LOAD_LATENCY],word1[LOAD_LATENCY+1]
230 (ELD) add result1[LOAD_LATENCY-1]=result1[LOAD_LATENCY],word1[LOAD_LATENCY]
241 add result1[LOAD_LATENCY+1]=result1[LOAD_LATENCY+1],carry1
244 cmp.ltu p6,p0=result1[LOAD_LATENCY+1],carry1
247 (p6) adds result1[LOAD_LATENCY+1]=1,result1[LOAD_LATENCY+1]
250 add result1[0]=result1[LOAD_LATENCY+1],result2[LOAD_LATENCY+1]
252 cmp.ltu p6,p0=result1[0],result2[LOAD_LATENCY+1]
254 (p6) adds result1[0]=1,result1[0]
262 zxt4 tmp1=result1[0]
263 shr.u tmp2=result1[0],32
265 add result1[0]=tmp1,tmp2
267 and tmp1=result1[0],tmp3
268 shr.u tmp2=result1[0],16
270 add result1[0]=tmp1,tmp2
272 and tmp1=result1[0],tmp3
273 shr.u tmp2=result1[0],16
275 add result1[0]=tmp1,tmp2
277 and tmp1=result1[0],tmp3
278 shr.u tmp2=result1[0],16