Lines Matching refs:d0
113 move.l #_dprbase, %d0
114 andi.l #MCU_SIM_MBAR_BA_MASK, %d0
115 ori.l #MCU_SIM_MBAR_AS_MASK, %d0
116 moves.l %d0, %a0@
139 move.w #16384, %d0
141 subi.w #1, %d0
162 move.l #MCU_SIM_GMR, %d0
163 move.l %d0, GMR
166 move.l #RAMEND, %d0
167 subi.l #__ramstart, %d0
168 subq.l #0x01, %d0
169 eori.l #SIM_OR_MASK, %d0
170 ori.l #SIM_OR0_MASK, %d0
171 move.l %d0, OR0
173 move.l #__ramstart, %d0
174 ori.l #SIM_BR0_MASK, %d0
175 move.l %d0, BR0
178 move.l #ROMEND, %d0
179 subi.l #__rom_start, %d0
180 subq.l #0x01, %d0
181 eori.l #SIM_OR_MASK, %d0
182 ori.l #SIM_OR1_MASK, %d0
183 move.l %d0, OR1
185 move.l #__rom_start, %d0
186 ori.l #SIM_BR1_MASK, %d0
187 move.l %d0, BR1
195 move.l %a0@, %d0
196 move.l %d0, %a1@
214 move.l %a0@, %d0
216 move.l %d0, %a1@
237 move.l #RAMEND, %d0
238 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
239 move.l %d0, _ramend /* Different from RAMEND.*/