Lines Matching refs:w
944 andi.w &0x007f,%d1 # extract extension
955 mov.l (tbl_unsupp.l,%pc,%d1.w*4),%d1 # fetch routine addr
967 # funfl_{unfl,inex}_on() because w/ both exceptions disabled, this
1245 bne.w fu_out # yes
1250 beq.w fu_in_pack
1367 bra.w fu_in_exc_ovfl # go insert overflow frame
1391 bne.w fu_in_exc_unfl # yes
1393 bne.w fu_in_exc_ovfl # yes
1403 mov.w (tbl_except.b,%pc,%d0.w*2),2+FP_SRC(%a6) # create exc status
1420 mov.w &0x4,%d0
1423 mov.w &0x03,%d0
1440 mov.w LOCAL_EX(%a0),%d0 # fetch src exponent
1441 andi.w &0x7fff,%d0 # strip sign
1442 cmpi.w %d0,&0x3f80 # is |exp| == $3f80?
1444 cmpi.w %d0,&0x407f # no; is |exp| == $407f?
1486 neg.w %d0 # -shft amt
1487 addi.w &0x3c01,%d0 # adjust new exponent
1488 andi.w &0x8000,LOCAL_EX(%a0) # clear old exponent
1489 or.w %d0,LOCAL_EX(%a0) # insert new exponent
1502 beq.w fu_out_pack
1504 beq.w fu_out_pack
1542 # OPERR : fmove.{b,w,l} out of large UNNORM
1660 mov.w (tbl_fu_out.b,%pc,%d0.w*2),%d0
1661 jmp (tbl_fu_out.b,%pc,%d0.w*1)
1681 mov.w &0x30d8,EXC_VOFF(%a6) # vector offset = 0xd8
1682 mov.w &0xe006,2+FP_SRC(%a6)
1696 mov.w &0x30d0,EXC_VOFF(%a6) # vector offset = 0xd0
1697 mov.w &0xe004,2+FP_SRC(%a6)
1713 mov.w &0x30d4,EXC_VOFF(%a6) # vector offset = 0xd4
1714 mov.w &0xe005,2+FP_SRC(%a6)
1766 mov.w &0x30cc,EXC_VOFF(%a6) # vector offset = 0xcc
1767 mov.w &0xe003,2+FP_DST(%a6)
1794 mov.w &0x30c4,EXC_VOFF(%a6) # vector offset = 0xc4
1795 mov.w &0xe001,2+FP_SRC(%a6)
1869 bne.w fu_in_ena_p # some are enabled
1884 bne.w fu_in_exit_s_p # supervisor
1897 bne.w fu_trace_p # yes
1920 bne.w fu_trace_p # yes
1940 beq.w fu_in_cont_p # no
1944 beq.w fu_in_cont_p # no
1945 bra.w fu_in_exc_ovfl_p # do _real_inex() now
1969 bne.w fu_in_exc_unfl_p # yes
1971 bne.w fu_in_exc_ovfl_p # yes
1981 bne.w fu_in_exc_exit_s_p # supervisor
1987 mov.w (tbl_except_p.b,%pc,%d0.w*2),2+FP_SRC(%a6)
1998 bne.w fu_trace_p # yes
2007 mov.w &0x3,%d0
2008 bra.w fu_in_exc_exit_p
2011 mov.w &0x4,%d0
2012 bra.w fu_in_exc_exit_p
2018 mov.w (tbl_except_p.b,%pc,%d0.w*2),2+FP_SRC(%a6)
2056 mov.w &0x2024,0x6(%sp)
2109 bne.w fu_out_ena_p # some are enabled
2128 bne.w fu_trace_p # yes
2311 mov.w FP_SRC_EX(%a6),%d0 # fetch DENORM exponent
2312 andi.w &0x7fff,%d0 # strip sign
2314 cmpi.w %d0,&0x3f80
2316 neg.w %d0 # make exponent negative
2317 addi.w &0x3f81,%d0 # find amt to shift
2322 andi.w &0x8000,FP_SRC_EX(%a6) # clear old exponent
2323 ori.w &0x3f80,FP_SRC_EX(%a6) # insert new "skewed" exponent
2328 mov.w FP_SRC_EX(%a6),%d0 # fetch DENORM exponent
2329 andi.w &0x7fff,%d0 # strip sign
2331 cmpi.w %d0,&0x3c00
2336 mov.w %d0,FP_SRC_EX(%a6) # insert exponent with cleared sign
2339 mov.w &0x3c01,%d1 # pass denorm threshold
2341 mov.w &0x3c00,%d0 # new exponent
2347 mov.w %d0,FP_SRC_EX(%a6) # insert new exponent
2405 # (2) The "fmovm.x" instruction w/ dynamic register specification. #
2406 # (3) The "fmovm.l" instruction w/ 2 or 3 control registers. #
2408 # For immediate data operations, the data is read in w/ a #
2461 bne.w iea_disabled # yes
2480 tst.w %d0 # is operation fmovem?
2481 bmi.w iea_fmovm # yes
2595 andi.w &0x007f,%d1 # extract extension
2603 mov.l (tbl_unsupp.l,%pc,%d1.w*4),%d1 # fetch routine addr
2935 mov.w EXC_SR+LOCAL_SIZE(%sp),0x0+LOCAL_SIZE(%sp)
2938 mov.w &0x2024,0x6+LOCAL_SIZE(%sp) # stk fmt = 0x2; voff = 0x024
2964 tst.w %d0 # is instr fmovm?
2991 mov.w %d0,EXC_VOFF(%a6) # store stack shift value
3002 mov.w 0xc(%sp),0x4(%sp) # move SR
3005 mov.w 0x12(%sp),%d0
3008 mov.w &0x402c,0xa(%sp) # insert offset,frame format
3026 subq.w &0x8,%sp # make stack frame bigger
3028 mov.w 0xc(%sp),0x4(%sp) # store lo(PC)
3029 mov.w &0x4008,0x6(%sp) # store voff
3053 mov.w 0x8+LOCAL_SIZE(%sp),-0x8+0x8+LOCAL_SIZE(%sp)
3054 mov.w &0x4008,-0x8+0xa+LOCAL_SIZE(%sp)
3056 mov.w %d0,-0x8+0x10+LOCAL_SIZE(%sp)
3057 mov.w &0x0001,-0x8+0x12+LOCAL_SIZE(%sp)
3060 add.w &LOCAL_SIZE-0x4,%sp
3076 # store_dreg_{b,w,l}() - store data to data regfile (opclass 3) #
3077 # facc_out_{b,w,l}() - store to memory took access error (opcl 3) #
3167 mov.w FP_SRC_EX(%a6),%d1 # fetch exponent
3168 andi.w &0x7fff,%d1
3169 cmpi.w %d1,&0x7fff
3192 mov.w (tbl_operr.b,%pc,%d0.w*2),%a0
3305 link.w %a6,&-LOCAL_SIZE # init stack frame
3324 bne.w fsnan_out # fmove out
3362 mov.w (tbl_snan.b,%pc,%d0.w*2),%a0
3771 link.w %a6,&-LOCAL_SIZE # init stack frame
3836 # This code also must check for "fmovecr" instructions w/ a #
3848 cmpi.w 0x6(%sp),&0x202c
3853 cmpi.w 0x6(%sp),&0x402c
3857 # if the F-Line instruction is an "fmovecr" w/ a non-zero <ea>. if
3861 link.w %a6,&-LOCAL_SIZE # init stack frame
3871 cmpi.w %d1,&0x03c8
4063 bne.w funimp_misc # type 1
4077 beq.w funimp_fmovcr # yes
4086 andi.w &0x003f,%d1 # extract extension bits
4087 lsl.w &0x3,%d1 # shift right 3 bits
4093 mov.w (tbl_trans.w,%pc,%d1.w*2),%d1
4094 jsr (tbl_trans.w,%pc,%d1.w*1) # emulate
4098 bne.w funimp_ena # some are enabled
4222 mov.w (tbl_funimp_except.b,%pc,%d0.w*2),2+FP_SRC(%a6)
4232 mov.w &0xe005,2+FP_SRC(%a6)
4238 mov.w &0xe003,2+FP_SRC(%a6)
4249 bra.w funimp_gen_exit_cmp
4360 bne.w funimp_done # no
4379 mov.w 0x6(%sp),0x4(%sp) # shift lo(PC)
4380 mov.w &0x2024,0x6(%sp) # fmt/voff = $2024
4404 mov.w &0x00c0,2+EXC_EA(%a6) # Fmt = 0x0; Vector Offset = 0x0c0
4406 mov.w EXC_SR(%a6),2+EXC_PC(%a6) # shift SR "up"
4408 mov.w &0xe000,2+FP_SRC(%a6) # bsun exception enabled
5312 # mov.w &0x0000,XDCARE(%a6) # JUST IN CASE
5349 mov.w 4(%a0),%d1
5354 bra.w SCSM
5359 bra.w SREDUCEX
5386 bge.w NEVEN
5539 bgt.w SREDUCEX
5544 # mov.w &0x0000,XDCARE(%a6)
5584 mov.w &0x7ffe,FP_SCR0_EX(%a6)
5589 mov.w &0x7fdc,FP_SCR1_EX(%a6)
5594 fblt.w sred_neg
5610 mov.w INARG(%a6),%d1
5636 mov.w %d2,FP_SCR0_EX(%a6) # FP_SCR0 = 2**(-L)*(2/PI)
6090 mov.w %d2,FP_SCR0_EX(%a6)
6095 mov.w %d1,FP_SCR1_EX(%a6)
6106 fmul.x FP_SCR1(%a6),%fp5 # fp5 = w = N*P2
6109 #--we want P+p = W+w but |p| <= half ulp of P
6115 fadd.x %fp5,%fp4 # fp4 = p = (W-P)+w
6125 bgt.w RESTORE
6130 bra.w LOOP
6140 bra.w TANCONT
6453 bgt.w ATANBIG # I.E. |X| >= 16
6463 blt.w ATANTINY
6514 bgt.w ATANHUGE
6644 blt.w ASINTINY
6733 mov.l (%a0),%d1 # pack exp w/ upper 16 fraction
6734 mov.w 4(%a0),%d1
7637 neg.w %d0 # new exp = -(shft amt)
7638 subi.w &0x3fff,%d0 # subtract off the bias
7639 fmov.w %d0,%fp0 # return exp in fp0
7645 mov.w SRC_EX(%a0),%d0 # get the exp
7646 ori.w &0x7fff,%d0 # clear old exp
7652 mov.w %d0,FP_SCR0_EX(%a6) # insert new exponent
8521 bra.w LOGBGN # begin regular log(X)
8543 bra.w LOGBGN # begin regular log(X)
9453 mulu.w &0xc,%d1 # offset points into tables
9460 fmovm.x (%a0,%d1.w),&0x80 # return result in fp0
9470 mov.w 0x0(%a0,%d1.w),FP_SCR1_EX(%a6) # load first word
9471 mov.l 0x4(%a0,%d1.w),FP_SCR1_HI(%a6) # load second word
9472 mov.l 0x8(%a0,%d1.w),FP_SCR1_LO(%a6) # load third word
9476 clr.w LOCAL_SGN(%a0) # sign always positive
9583 mov.w DST_EX(%a1),%d1 # get dst exponent
9587 mov.w SRC_EX(%a0),%d0 # check src bounds
9588 andi.w &0x7fff,%d0 # clr src sign bit
9589 cmpi.w %d0,&0x3fff # is src ~ ZERO?
9590 blt.w src_small # yes
9591 cmpi.w %d0,&0x400c # no; is src too big?
9592 bgt.w src_out # yes
10090 bra.w Fix_Sign
10097 beq.w Fix_Sign # Q is even
10101 mov.w SignX(%a6),%d6
10103 mov.w %d6,SignX(%a6)
10104 bra.w Fix_Sign
10166 # Entry point for scale w/ extended denorm. The function does
10212 mov.w LOCAL_EX(%a1),FP_SCR0_EX(%a6)
10219 andi.w &0x8000,FP_SCR0_EX(%a6) # keep old sign
10220 or.w %d0,FP_SCR0_EX(%a6) # insert new exponent
11638 mov.w FP_SCR0_EX(%a6),%d1 # load {sgn,exp}
11641 andi.w &0x8000,%d2 # keep old sign
11643 or.w %d2,%d1 # concat old sign,new exp
11644 mov.w %d1,FP_SCR0_EX(%a6) # insert new exponent
11758 bra.w fmul_normal_exit
11987 # strictly compatible w/ the 68881/882, we make sure to return an
11988 # INF w/ the j-bit set if the input INF j-bit was set. Destination
12042 # Norms can be emulated w/ a regular fmove instruction. For #
12280 mov.w FP_SCR0_EX(%a6),%d1 # fetch {sgn,exp}
12283 andi.w &0x8000,%d2 # keep old sign
12286 andi.w &0x7fff,%d1
12287 or.w %d2,%d1
12288 mov.w %d1,FP_SCR0_EX(%a6) # insert new exponent
12309 fbge.w fin_sd_ovfl_tst # yes; overflow has occurred
13060 mov.w FP_SCR0_EX(%a6),%d1 # fetch {sgn,exp}
13063 andi.w &0x8000,%d2 # keep old sign
13066 andi.w &0x7fff,%d1
13067 or.w %d2,%d1 # concat sign,exp
13068 mov.w %d1,FP_SCR0_EX(%a6) # insert new exponent
13089 fbge.w fneg_sd_ovfl_tst # yes; overflow has occurred
13377 mov.w SRC_EX(%a0),FP_SCR0_EX(%a6) # copy sign, zero exp
13463 bne.w fabs_not_norm # optimize on non-norm input
13479 mov.w SRC_EX(%a0),%d1
13481 mov.w %d1,FP_SCR0_EX(%a6) # insert exponent
13497 mov.w SRC_EX(%a0),%d0
13499 mov.w %d0,FP_SCR0_EX(%a6) # insert exponent
13515 neg.w %d0 # new exponent = -(shft val)
13516 addi.w &0x6000,%d0 # add new bias to exponent
13517 mov.w FP_SCR0_EX(%a6),%d1 # fetch old sign,exp
13518 andi.w &0x8000,%d1 # keep old sign
13519 andi.w &0x7fff,%d0 # clear sign position
13520 or.w %d1,%d0 # concat old sign, new exponent
13521 mov.w %d0,FP_SCR0_EX(%a6) # insert new exponent
13536 mov.w SRC_EX(%a0),FP_SCR0_EX(%a6)
13542 bge.w fabs_sd_unfl # yes; go handle underflow
13544 beq.w fabs_sd_may_ovfl # maybe; go check
13545 blt.w fabs_sd_ovfl # yes; go handle overflow
13564 mov.w FP_SCR0_EX(%a6),%d1 # load sgn,exp
13568 andi.w &0x8000,%d2 # keep old sign
13569 or.w %d1,%d2 # concat old sign,new exp
13570 mov.w %d2,FP_SCR0_EX(%a6) # insert new exponent
13579 mov.w SRC_EX(%a0),FP_SCR0_EX(%a6)
13587 beq.w fabs_sd_may_ovfl # maybe; go check
13588 blt.w fabs_sd_ovfl # yes; go handle overflow
13589 bra.w fabs_sd_normal # no; ho handle normalized op
13619 mov.w FP_SCR0_EX(%a6),%d1 # load current exponent
13624 andi.w &0x8000,%d2 # keep old sign
13627 andi.w &0x7fff,%d1
13628 or.w %d2,%d1 # concat new sign,new exp
13629 mov.w %d1,FP_SCR1_EX(%a6) # insert new exp
13707 bra.w fabs_sd_normal_exit
13716 beq.w fabs_denorm
13758 clr.w %d1
13782 mov.w (tbl_fcmp_op.b,%pc,%d1.w*2),%d1
13783 jmp (tbl_fcmp_op.b,%pc,%d1.w*1)
13962 clr.w %d1
13967 bne.w fsglmul_not_norm # optimize on non-norm input
13970 mov.w DST_EX(%a1),FP_SCR1_EX(%a6)
13974 mov.w SRC_EX(%a0),FP_SCR0_EX(%a6)
13986 beq.w fsglmul_may_ovfl # result may rnd to overflow
13987 blt.w fsglmul_ovfl # result will overflow
13990 beq.w fsglmul_may_unfl # result may rnd to no unfl
13991 bgt.w fsglmul_unfl # result will underflow
14009 mov.w FP_SCR0_EX(%a6),%d1 # load {sgn,exp}
14012 andi.w &0x8000,%d2 # keep old sign
14014 or.w %d2,%d1 # concat old sign,new exp
14015 mov.w %d1,FP_SCR0_EX(%a6) # insert new exponent
14056 mov.w FP_SCR0_EX(%a6),%d1 # fetch {sgn,exp}
14061 andi.w &0x7fff,%d1
14062 andi.w &0x8000,%d2 # keep old sign
14063 or.w %d2,%d1 # concat old sign,new exp
14064 mov.w %d1,FP_SCR0_EX(%a6) # insert new exponent
14084 fbge.w fsglmul_ovfl_tst # yes; overflow has occurred
14303 clr.w %d1
14308 bne.w fsgldiv_not_norm # optimize on non-norm input
14314 mov.w DST_EX(%a1),FP_SCR1_EX(%a6)
14318 mov.w SRC_EX(%a0),FP_SCR0_EX(%a6)
14330 mov.w 2+L_SCR3(%a6),%d1 # fetch precision,mode
14334 ble.w fsgldiv_may_ovfl
14337 beq.w fsgldiv_may_unfl # maybe
14338 bgt.w fsgldiv_unfl # yes; go handle underflow
14356 mov.w FP_SCR0_EX(%a6),%d1 # load {sgn,exp}
14359 andi.w &0x8000,%d2 # keep old sign
14361 or.w %d2,%d1 # concat old sign,new exp
14362 mov.w %d1,FP_SCR0_EX(%a6) # insert new exponent
14381 mov.w (%sp),%d1 # fetch new exponent
14389 or.w &ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
14409 mov.w FP_SCR0_EX(%a6),%d1 # fetch {sgn,exp}
14412 andi.w &0x8000,%d2 # keep old sign
14415 andi.w &0x7fff,%d1 # clear ms bit
14416 or.w %d2,%d1 # concat old sign,new exp
14417 mov.w %d1,FP_SCR0_EX(%a6) # insert new exponent
14466 mov.w FP_SCR0_EX(%a6),%d1 # fetch {sgn,exp}
14469 andi.w &0x8000,%d2 # keep old sign
14472 andi.w &0x7fff,%d1 # clear top bit
14473 or.w %d2,%d1 # concat old sign, new exp
14474 mov.w %d1,FP_SCR0_EX(%a6) # insert new exponent
14497 fbgt.w fsgldiv_normal_exit # no; no underflow occurred
14498 fblt.w fsgldiv_unfl # yes; underflow occurred
14520 fbge.w fsgldiv_normal_exit # no; no underflow occurred
14521 bra.w fsgldiv_unfl # yes; underflow occurred
14529 mov.w (tbl_fsgldiv_op.b,%pc,%d1.w*2),%d1
14530 jmp (tbl_fsgldiv_op.b,%pc,%d1.w*1)
14650 clr.w %d1
14655 bne.w fadd_not_norm # optimize on non-norm input
14676 fbeq.w fadd_zero_exit # if result is zero, end now
14682 mov.w 2+L_SCR3(%a6),%d1
14685 mov.w (%sp),%d2 # fetch new sign, exp
14689 cmp.l %d2,(tbl_fadd_ovfl.b,%pc,%d1.w*4) # is it an overflow?
14692 cmp.l %d2,(tbl_fadd_unfl.b,%pc,%d1.w*4) # is it an underflow?
14693 blt.w fadd_unfl # yes
14694 beq.w fadd_may_unfl # maybe; go find out
14697 mov.w (%sp),%d1
14698 andi.w &0x8000,%d1 # keep sign
14699 or.w %d2,%d1 # concat sign,new exp
14700 mov.w %d1,(%sp) # insert new exponent
14745 mov.w (%sp),%d1
14746 andi.w &0x8000,%d1 # keep sign
14748 andi.w &0x7fff,%d2
14749 or.w %d2,%d1 # concat sign,new exp
14750 mov.w %d1,(%sp) # insert new exponent
14819 mov.w FP_SCR0_EX(%a6),%d1 # fetch {sgn,exp}
14822 andi.w &0x8000,%d2 # keep old sign
14825 andi.w &0x7fff,%d1 # clear top bit
14826 or.w %d2,%d1 # concat sign,new exp
14827 mov.w %d1,FP_SCR0_EX(%a6) # insert new exponent
14829 bra.w fadd_unfl_dis
14846 beq.w fadd_normal # yes; no underflow occurred
14850 bne.w fadd_normal # no; no underflow occurred
14853 bne.w fadd_normal # no; no underflow occurred
14856 beq.w fadd_normal # no; no underflow occurred
14884 fbgt.w fadd_unfl # yes; it's an underflow
14893 mov.w (tbl_fadd_op.b,%pc,%d1.w*2),%d1
14894 jmp (tbl_fadd_op.b,%pc,%d1.w*1)
14964 bmi.w fadd_zero_2_chk_rm # weed out (-ZERO)+(+ZERO)
14998 mov.w SRC_EX(%a0),FP_SCR0_EX(%a6)
15002 clr.w FP_SCR1_EX(%a6)
15005 bra.w fadd_zero_entry # go execute fadd
15008 mov.w DST_EX(%a1),FP_SCR1_EX(%a6)
15012 clr.w FP_SCR0_EX(%a6)
15015 bra.w fadd_zero_entry # go execute fadd
15103 clr.w %d1
15108 bne.w fsub_not_norm # optimize on non-norm input
15129 fbeq.w fsub_zero_exit # if result zero, end now
15135 mov.w 2+L_SCR3(%a6),%d1
15138 mov.w (%sp),%d2 # fetch new exponent
15142 cmp.l %d2,(tbl_fsub_ovfl.b,%pc,%d1.w*4) # is it an overflow?
15145 cmp.l %d2,(tbl_fsub_unfl.b,%pc,%d1.w*4) # is it an underflow?
15146 blt.w fsub_unfl # yes
15147 beq.w fsub_may_unfl # maybe; go find out
15150 mov.w (%sp),%d1
15151 andi.w &0x8000,%d1 # keep sign
15152 or.w %d2,%d1 # insert new exponent
15153 mov.w %d1,(%sp) # insert new exponent
15198 mov.w (%sp),%d1 # fetch {sgn,exp}
15199 andi.w &0x8000,%d1 # keep sign
15201 andi.w &0x7fff,%d2 # clear top bit
15202 or.w %d2,%d1 # concat sign,exp
15203 mov.w %d1,(%sp) # insert new exponent
15272 mov.w FP_SCR0_EX(%a6),%d1 # fetch {sgn,exp}
15275 andi.w &0x8000,%d2 # keep old sign
15278 andi.w &0x7fff,%d1 # clear top bit
15279 or.w %d2,%d1 # concat sgn,exp
15280 mov.w %d1,FP_SCR0_EX(%a6) # insert new exponent
15282 bra.w fsub_unfl_dis
15299 beq.w fsub_normal # yes; no underflow occurred
15303 bne.w fsub_normal # no; no underflow occurred
15306 bne.w fsub_normal # no; no underflow occurred
15309 beq.w fsub_normal # no; no underflow occurred
15337 fbgt.w fsub_unfl # yes; it's an underflow
15346 mov.w (tbl_fsub_op.b,%pc,%d1.w*2),%d1
15347 jmp (tbl_fsub_op.b,%pc,%d1.w*1)
15419 # the signs are opposite, so, return a ZERO w/ the sign of the dst ZERO
15450 mov.w SRC_EX(%a0),FP_SCR0_EX(%a6)
15454 clr.w FP_SCR1_EX(%a6)
15457 bra.w fsub_zero_entry # go execute fsub
15460 mov.w DST_EX(%a1),FP_SCR1_EX(%a6)
15464 clr.w FP_SCR0_EX(%a6)
15467 bra.w fsub_zero_entry # go execute fsub
15485 fbge.w fsub_inf_done # sign is now positive
15661 bne.w fsqrt_sd_normal # yes, so no underflow
15701 mov.w FP_SCR0_EX(%a6),%d1 # load current exponent
15706 andi.w &0x8000,%d2 # keep old sign
15709 andi.w &0x7fff,%d1
15710 or.w %d2,%d1 # concat new sign,new exp
15711 mov.w %d1,FP_SCR1_EX(%a6) # insert new exp
15792 bra.w fsqrt_sd_normal_exit
15801 beq.w fsqrt_denorm
15872 mov.w SRC_EX(%a0),%d0
15873 mov.w DST_EX(%a1),%d1
15874 mov.w %d0,FP_SCR0_EX(%a6)
15875 mov.w %d1,FP_SCR1_EX(%a6)
15877 andi.w &0x7fff,%d0
15878 andi.w &0x7fff,%d1
15879 mov.w %d0,L_SCR1(%a6) # store src exponent
15880 mov.w %d1,2+L_SCR1(%a6) # store dst exponent
15882 cmp.w %d0, %d1 # is src exp >= dst exp?
15895 neg.w %d0 # new exp = -(shft val)
15896 mov.w %d0,L_SCR1(%a6) # inset new exp
15899 mov.w 2+L_SCR1(%a6),%d0
15900 subi.w &mantissalen+2,%d0 # subtract mantissalen+2 from larger exp
15902 cmp.w %d0,L_SCR1(%a6) # is difference >= len(mantissa)+2?
15905 mov.w L_SCR1(%a6),%d0
15906 add.w 0x2(%sp),%d0 # scale src exponent by scale factor
15907 mov.w FP_SCR0_EX(%a6),%d1
15908 and.w &0x8000,%d1
15909 or.w %d1,%d0 # concat {sgn,new exp}
15910 mov.w %d0,FP_SCR0_EX(%a6) # insert new dst exponent
15916 andi.w &0x8000,FP_SCR0_EX(%a6) # zero src exponent
15931 neg.w %d0 # new exp = -(shft val)
15932 mov.w %d0,2+L_SCR1(%a6) # inset new exp
15935 mov.w L_SCR1(%a6),%d0
15936 subi.w &mantissalen+2,%d0 # subtract mantissalen+2 from larger exp
15938 cmp.w %d0,2+L_SCR1(%a6) # is difference >= len(mantissa)+2?
15941 mov.w 2+L_SCR1(%a6),%d0
15942 add.w 0x2(%sp),%d0 # scale dst exponent by scale factor
15943 mov.w FP_SCR1_EX(%a6),%d1
15944 andi.w &0x8000,%d1
15945 or.w %d1,%d0 # concat {sgn,new exp}
15946 mov.w %d0,FP_SCR1_EX(%a6) # insert new dst exponent
15952 andi.w &0x8000,FP_SCR1_EX(%a6) # zero dst exponent
15985 mov.w FP_SCR0_EX(%a6),%d1 # extract operand's {sgn,exp}
15990 andi.w &0x8000,%d0 # extract operand's sgn
15993 mov.w %d0,FP_SCR0_EX(%a6) # insert biased exponent
16050 ori.w &0x3fff,FP_SCR0_EX(%a6) # insert new operand's exponent(=0)
16072 ori.w &0x3fff,FP_SCR0_EX(%a6) # insert new operand's exponent(=0)
16112 mov.w FP_SCR1_EX(%a6),%d1 # extract operand's {sgn,exp}
16117 andi.w &0x8000,%d0 # extract operand's sgn
16120 mov.w %d0,FP_SCR1_EX(%a6) # insert biased exponent
16141 # res_qnan(): return default result w/ QNAN operand for dyadic #
16142 # res_snan(): return default result w/ SNAN operand for dyadic #
16143 # res_qnan_1op(): return dflt result w/ QNAN operand for monadic #
16144 # res_snan_1op(): return dflt result w/ SNAN operand for monadic #
16282 mov.w EXC_CMDREG(%a6),%d0 # fetch predicate
16289 mov.w (tbl_fdbcc.b,%pc,%d0.w*2),%d1 # load table
16290 jmp (tbl_fdbcc.b,%pc,%d1.w) # jump to fdbcc routine
16350 fbeq.w fdbcc_eq_yes # equal?
16352 bra.w fdbcc_false # no; go handle counter
16362 fbneq.w fdbcc_neq_yes # not equal?
16364 bra.w fdbcc_false # no; go handle counter
16374 fbgt.w fdbcc_gt_yes # greater than?
16376 beq.w fdbcc_false # no;go handle counter
16379 bne.w fdbcc_bsun # yes; we have an exception
16380 bra.w fdbcc_false # no; go handle counter
16390 fbngt.w fdbcc_ngt_yes # not greater than?
16392 bra.w fdbcc_false # no; go handle counter
16398 bne.w fdbcc_bsun # yes; we have an exception
16408 fbge.w fdbcc_ge_yes # greater than or equal?
16411 beq.w fdbcc_false # no;go handle counter
16414 bne.w fdbcc_bsun # yes; we have an exception
16415 bra.w fdbcc_false # no; go handle counter
16421 bne.w fdbcc_bsun # yes; we have an exception
16431 fbnge.w fdbcc_nge_yes # not (greater than or equal)?
16433 bra.w fdbcc_false # no; go handle counter
16439 bne.w fdbcc_bsun # yes; we have an exception
16449 fblt.w fdbcc_lt_yes # less than?
16452 beq.w fdbcc_false # no; go handle counter
16455 bne.w fdbcc_bsun # yes; we have an exception
16456 bra.w fdbcc_false # no; go handle counter
16466 fbnlt.w fdbcc_nlt_yes # not less than?
16468 bra.w fdbcc_false # no; go handle counter
16474 bne.w fdbcc_bsun # yes; we have an exception
16484 fble.w fdbcc_le_yes # less than or equal?
16487 beq.w fdbcc_false # no; go handle counter
16490 bne.w fdbcc_bsun # yes; we have an exception
16491 bra.w fdbcc_false # no; go handle counter
16497 bne.w fdbcc_bsun # yes; we have an exception
16507 fbnle.w fdbcc_nle_yes # not (less than or equal)?
16509 bra.w fdbcc_false # no; go handle counter
16512 beq.w fdbcc_nle_done # no; go finish
16515 bne.w fdbcc_bsun # yes; we have an exception
16525 fbgl.w fdbcc_gl_yes # greater or less than?
16528 beq.w fdbcc_false # no; handle counter
16531 bne.w fdbcc_bsun # yes; we have an exception
16532 bra.w fdbcc_false # no; go handle counter
16542 fbngl.w fdbcc_ngl_yes # not (greater or less than)?
16544 bra.w fdbcc_false # no; go handle counter
16550 bne.w fdbcc_bsun # yes; we have an exception
16560 fbgle.w fdbcc_gle_yes # greater, less, or equal?
16564 bne.w fdbcc_bsun # yes; we have an exception
16565 bra.w fdbcc_false # no; go handle counter
16575 fbngle.w fdbcc_ngle_yes # not (greater, less, or equal)?
16577 bra.w fdbcc_false # no; go handle counter
16581 bne.w fdbcc_bsun # yes; we have an exception
16598 bra.w fdbcc_false # go handle counter
16615 beq.w fdbcc_false # no;go handle counter
16618 bne.w fdbcc_bsun # yes; we have an exception
16619 bra.w fdbcc_false # go handle counter
16631 bne.w fdbcc_bsun # yes; we have an exception
16641 fbseq.w fdbcc_seq_yes # signalling equal?
16644 beq.w fdbcc_false # no;go handle counter
16647 bne.w fdbcc_bsun # yes; we have an exception
16648 bra.w fdbcc_false # go handle counter
16654 bne.w fdbcc_bsun # yes; we have an exception
16664 fbsneq.w fdbcc_sneq_yes # signalling not equal?
16667 beq.w fdbcc_false # no;go handle counter
16670 bne.w fdbcc_bsun # yes; we have an exception
16671 bra.w fdbcc_false # go handle counter
16674 beq.w fdbcc_sneq_done # no;go finish
16677 bne.w fdbcc_bsun # yes; we have an exception
16698 fbogt.w fdbcc_ogt_yes # ordered greater than?
16700 bra.w fdbcc_false # no; go handle counter
16710 fbule.w fdbcc_ule_yes # unordered or less or equal?
16712 bra.w fdbcc_false # no; go handle counter
16722 fboge.w fdbcc_oge_yes # ordered greater than or equal?
16724 bra.w fdbcc_false # no; go handle counter
16734 fbult.w fdbcc_ult_yes # unordered or less than?
16736 bra.w fdbcc_false # no; go handle counter
16746 fbolt.w fdbcc_olt_yes # ordered less than?
16748 bra.w fdbcc_false # no; go handle counter
16758 fbuge.w fdbcc_uge_yes # unordered or greater than?
16760 bra.w fdbcc_false # no; go handle counter
16770 fbole.w fdbcc_ole_yes # ordered greater or less than?
16772 bra.w fdbcc_false # no; go handle counter
16782 fbugt.w fdbcc_ugt_yes # unordered or greater than?
16784 bra.w fdbcc_false # no; go handle counter
16794 fbogl.w fdbcc_ogl_yes # ordered greater or less than?
16796 bra.w fdbcc_false # no; go handle counter
16806 fbueq.w fdbcc_ueq_yes # unordered or equal?
16808 bra.w fdbcc_false # no; go handle counter
16818 fbor.w fdbcc_or_yes # ordered?
16820 bra.w fdbcc_false # no; go handle counter
16830 fbun.w fdbcc_un_yes # unordered?
16832 bra.w fdbcc_false # no; go handle counter
16849 andi.w &0x7, %d1 # extract count register
18053 bne.w fscc_bsun
18107 bne.w fscc_err # yes
18110 andi.w &0x7,%d1 # pass index in d1
18237 beq.w fmovm_data_done
18241 beq.w fmovm_data_in # it's a move out
18344 bne.w fmovm_out_err # yes
18365 bne.w fmovm_in_err # yes
18528 mov.w EXC_OPWORD(%a6),%d0 # fetch opcode word
18529 mov.w %d0,%d1 # make a copy
18531 andi.w &0x3f,%d0 # extract mode field
18535 mov.w (tbl_fea_mode.b,%pc,%d0.w*2),%d0 # fetch jmp distance
18536 jmp (tbl_fea_mode.b,%pc,%d0.w*1) # jmp to correct ea mode
18648 # Address register indirect w/ postincrement: (An)+ #
18717 # Address register indirect w/ predecrement: -(An) #
18778 # Address register indirect w/ displacement: (d16, An) #
18788 mov.w %d0,%a0 # sign extend displacement
18801 mov.w %d0,%a0 # sign extend displacement
18814 mov.w %d0,%a0 # sign extend displacement
18827 mov.w %d0,%a0 # sign extend displacement
18840 mov.w %d0,%a0 # sign extend displacement
18853 mov.w %d0,%a0 # sign extend displacement
18866 mov.w %d0,%a0 # sign extend displacement
18879 mov.w %d0,%a0 # sign extend displacement
18885 # Address register indirect w/ index(8-bit displacement): (d8, An, Xn) #
18905 bne.w fcalc_mem_ind
18910 rol.w &0x4,%d1
18911 andi.w &0xf,%d1 # extract index regno
18924 rol.w &0x7,%d1
18947 mov.w %d0,%a0 # return <ea> in a0
18965 # Program counter indirect w/ displacement: (d16, PC) #
18975 mov.w %d0,%a0 # sign extend displacement
18984 # PC indirect w/ index(8-bit displacement): (d8, PC, An) #
18985 # " " w/ " (base displacement): (bd, PC, An) #