218 #define PERF_IRQMASK_6328_REG(x)	(0x20 + (x) * 0x10)  argument
222 #define PERF_IRQMASK_6358_REG(x)	(0xc + (x) * 0x2c)  argument
223 #define PERF_IRQMASK_6362_REG(x)	(0x20 + (x) * 0x10)  argument
224 #define PERF_IRQMASK_6368_REG(x)	(0x20 + (x) * 0x10)  argument
228 #define PERF_IRQSTAT_6328_REG(x)	(0x28 + (x) * 0x10)  argument
232 #define PERF_IRQSTAT_6358_REG(x)	(0x10 + (x) * 0x2c)  argument
233 #define PERF_IRQSTAT_6362_REG(x)	(0x28 + (x) * 0x10)  argument
234 #define PERF_IRQSTAT_6368_REG(x)	(0x28 + (x) * 0x10)  argument
249 #define EXTIRQ_CFG_SENSE_6348(x)	(1 << (x))  argument
250 #define EXTIRQ_CFG_STAT_6348(x)		(1 << (x + 5))  argument
251 #define EXTIRQ_CFG_CLEAR_6348(x)	(1 << (x + 10))  argument
252 #define EXTIRQ_CFG_MASK_6348(x)		(1 << (x + 15))  argument
253 #define EXTIRQ_CFG_BOTHEDGE_6348(x)	(1 << (x + 20))  argument
254 #define EXTIRQ_CFG_LEVELSENSE_6348(x)	(1 << (x + 25))  argument
259 #define EXTIRQ_CFG_SENSE(x)		(1 << (x))  argument
260 #define EXTIRQ_CFG_STAT(x)		(1 << (x + 4))  argument
261 #define EXTIRQ_CFG_CLEAR(x)		(1 << (x + 8))  argument
262 #define EXTIRQ_CFG_MASK(x)		(1 << (x + 12))  argument
263 #define EXTIRQ_CFG_BOTHEDGE(x)		(1 << (x + 16))  argument
264 #define EXTIRQ_CFG_LEVELSENSE(x)	(1 << (x + 20))  argument
423 #define TIMER_IRQSTAT_TIMER_CAUSE(x)	(1 << (x))  argument
428 #define TIMER_IRQSTAT_TIMER_IR_EN(x)	(1 << ((x) + 8))  argument
434 #define TIMER_CTLx_REG(x)		(0x4 + (x * 4))  argument
640 #define ENET_PML_REG(x)			(0x58 + (x) * 8)  argument
641 #define ENET_PMH_REG(x)			(0x5c + (x) * 8)  argument
646 #define ENET_MIB_REG(x)			(0x200 + (x) * 4)  argument
660 #define ENETDMA_CFG_FLOWCH_MASK(x)	(1 << ((x >> 1) + 1))  argument
663 #define ENETDMA_FLOWCL_REG(x)		(0x4 + (x) * 6)  argument
666 #define ENETDMA_FLOWCH_REG(x)		(0x8 + (x) * 6)  argument
669 #define ENETDMA_BUFALLOC_REG(x)		(0xc + (x) * 6)  argument
680 #define ENETDMA_CHANCFG_REG(x)		(0x100 + (x) * 0x10)  argument
687 #define ENETDMA_IR_REG(x)		(0x104 + (x) * 0x10)  argument
693 #define ENETDMA_IRMASK_REG(x)		(0x108 + (x) * 0x10)  argument
696 #define ENETDMA_MAXBURST_REG(x)		(0x10C + (x) * 0x10)  argument
699 #define ENETDMA_RSTART_REG(x)		(0x200 + (x) * 0x10)  argument
702 #define ENETDMA_SRAM2_REG(x)		(0x204 + (x) * 0x10)  argument
705 #define ENETDMA_SRAM3_REG(x)		(0x208 + (x) * 0x10)  argument
708 #define ENETDMA_SRAM4_REG(x)		(0x20c + (x) * 0x10)  argument
784 #define ENETSW_PTCTRL_REG(x)		(0x0 + (x))  argument
803 #define ENETSW_PORTOV_REG(x)		(0x58 + (x))  argument
828 #define ENETSW_MIB_REG(x)		(0x2800 + (x) * 4)  argument
954 #define USBD_EVENT_IRQ_CFG_SHIFT(x)	((x & 0xf) << 1)  argument
955 #define USBD_EVENT_IRQ_CFG_MASK(x)	(3 << USBD_EVENT_IRQ_CFG_SHIFT(x))  argument
956 #define USBD_EVENT_IRQ_CFG_RISING(x)	(0 << USBD_EVENT_IRQ_CFG_SHIFT(x))  argument
957 #define USBD_EVENT_IRQ_CFG_FALLING(x)	(1 << USBD_EVENT_IRQ_CFG_SHIFT(x))  argument
1006 #define USBD_CSR_EP_REG(x)		(0x84 + (x) * 4)  argument
1033 #define MPI_CSBASE_REG(x)		(0x0 + (x) * 8)  argument
1057 #define MPI_CSCTL_REG(x)		(0x4 + (x) * 8)  argument
1115 #define MPI_LOCINT_MASK(x)		(1 << (x + 16))  argument
1116 #define MPI_LOCINT_STAT(x)		(1 << (x))  argument
1240 #define M2M_SRC_REG(x)			((x) * 0x40 + 0x00)  argument
1241 #define M2M_DST_REG(x)			((x) * 0x40 + 0x04)  argument
1242 #define M2M_SIZE_REG(x)			((x) * 0x40 + 0x08)  argument
1244 #define M2M_CTRL_REG(x)			((x) * 0x40 + 0x0c)  argument
1254 #define M2M_STAT_REG(x)			((x) * 0x40 + 0x10)  argument
1258 #define M2M_SRCID_REG(x)		((x) * 0x40 + 0x14)  argument
1259 #define M2M_DSTID_REG(x)		((x) * 0x40 + 0x18)  argument