64 ltq_dma_enable_irq(struct ltq_dma_channel *ch)  in ltq_dma_enable_irq()  argument
69 	ltq_dma_w32(ch->nr, LTQ_DMA_CS);  in ltq_dma_enable_irq()
70 	ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);  in ltq_dma_enable_irq()
76 ltq_dma_disable_irq(struct ltq_dma_channel *ch)  in ltq_dma_disable_irq()  argument
81 	ltq_dma_w32(ch->nr, LTQ_DMA_CS);  in ltq_dma_disable_irq()
82 	ltq_dma_w32_mask(1 << ch->nr, 0, LTQ_DMA_IRNEN);  in ltq_dma_disable_irq()
88 ltq_dma_ack_irq(struct ltq_dma_channel *ch)  in ltq_dma_ack_irq()  argument
93 	ltq_dma_w32(ch->nr, LTQ_DMA_CS);  in ltq_dma_ack_irq()
100 ltq_dma_open(struct ltq_dma_channel *ch)  in ltq_dma_open()  argument
105 	ltq_dma_w32(ch->nr, LTQ_DMA_CS);  in ltq_dma_open()
107 	ltq_dma_enable_irq(ch);  in ltq_dma_open()
113 ltq_dma_close(struct ltq_dma_channel *ch)  in ltq_dma_close()  argument
118 	ltq_dma_w32(ch->nr, LTQ_DMA_CS);  in ltq_dma_close()
120 	ltq_dma_disable_irq(ch);  in ltq_dma_close()
126 ltq_dma_alloc(struct ltq_dma_channel *ch)  in ltq_dma_alloc()  argument
130 	ch->desc = 0;  in ltq_dma_alloc()
131 	ch->desc_base = dma_alloc_coherent(NULL,  in ltq_dma_alloc()
133 				&ch->phys, GFP_ATOMIC);  in ltq_dma_alloc()
134 	memset(ch->desc_base, 0, LTQ_DESC_NUM * LTQ_DESC_SIZE);  in ltq_dma_alloc()
137 	ltq_dma_w32(ch->nr, LTQ_DMA_CS);  in ltq_dma_alloc()
138 	ltq_dma_w32(ch->phys, LTQ_DMA_CDBA);  in ltq_dma_alloc()
149 ltq_dma_alloc_tx(struct ltq_dma_channel *ch)  in ltq_dma_alloc_tx()  argument
153 	ltq_dma_alloc(ch);  in ltq_dma_alloc_tx()
157 	ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);  in ltq_dma_alloc_tx()
164 ltq_dma_alloc_rx(struct ltq_dma_channel *ch)  in ltq_dma_alloc_rx()  argument
168 	ltq_dma_alloc(ch);  in ltq_dma_alloc_rx()
172 	ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN);  in ltq_dma_alloc_rx()
179 ltq_dma_free(struct ltq_dma_channel *ch)  in ltq_dma_free()  argument
181 	if (!ch->desc_base)  in ltq_dma_free()
183 	ltq_dma_close(ch);  in ltq_dma_free()
185 		ch->desc_base, ch->phys);  in ltq_dma_free()