21 	u32 hi = 0, lo = value;  in pci_ohci_write_reg()  local
25 		_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);  in pci_ohci_write_reg()
27 			hi |= PCI_COMMAND_MASTER;  in pci_ohci_write_reg()
29 			hi &= ~PCI_COMMAND_MASTER;  in pci_ohci_write_reg()
32 			hi |= PCI_COMMAND_MEMORY;  in pci_ohci_write_reg()
34 			hi &= ~PCI_COMMAND_MEMORY;  in pci_ohci_write_reg()
35 		_wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);  in pci_ohci_write_reg()
39 			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);  in pci_ohci_write_reg()
42 				_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);  in pci_ohci_write_reg()
48 			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);  in pci_ohci_write_reg()
50 			_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);  in pci_ohci_write_reg()
52 			_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);  in pci_ohci_write_reg()
54 			_wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);  in pci_ohci_write_reg()
57 			hi = 0x40000000 | ((value & 0xff000000) >> 24);  in pci_ohci_write_reg()
59 			_wrmsr(GLIU_MSR_REG(GLIU_P2D_BM3), hi, lo);  in pci_ohci_write_reg()
63 		_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);  in pci_ohci_write_reg()
67 		_wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);  in pci_ohci_write_reg()
77 	u32 hi, lo;  in pci_ohci_read_reg()  local
85 		_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);  in pci_ohci_read_reg()
86 		if (hi & PCI_COMMAND_MASTER)  in pci_ohci_read_reg()
88 		if (hi & PCI_COMMAND_MEMORY)  in pci_ohci_read_reg()
94 		_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);  in pci_ohci_read_reg()
100 		_rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo);  in pci_ohci_read_reg()
110 		_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);  in pci_ohci_read_reg()
115 			_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);  in pci_ohci_read_reg()
117 			_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);  in pci_ohci_read_reg()
140 		_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);  in pci_ohci_read_reg()