69 	unsigned char reg_val;  in malta_piix_func0_fixup()  local
83 		pci_read_config_byte(pdev, PIIX4_FUNC0_PIRQRC+i, &reg_val);  in malta_piix_func0_fixup()
84 		if (reg_val & PIIX4_FUNC0_PIRQRC_IRQ_ROUTING_DISABLE)  in malta_piix_func0_fixup()
87 			pci_irq[PCIA+i] = piixirqmap[reg_val &  in malta_piix_func0_fixup()
97 		pci_read_config_byte(pdev, PIIX4_FUNC0_TOM, &reg_val);  in malta_piix_func0_fixup()
98 		pci_write_config_byte(pdev, PIIX4_FUNC0_TOM, reg_val |  in malta_piix_func0_fixup()
108 	pci_read_config_byte(pdev, PIIX4_FUNC0_SERIRQC, &reg_val);  in malta_piix_func0_fixup()
109 	reg_val |= PIIX4_FUNC0_SERIRQC_EN | PIIX4_FUNC0_SERIRQC_CONT;  in malta_piix_func0_fixup()
110 	pci_write_config_byte(pdev, PIIX4_FUNC0_SERIRQC, reg_val);  in malta_piix_func0_fixup()
123 	unsigned char reg_val;  in malta_piix_func1_fixup()  local
131 			&reg_val);  in malta_piix_func1_fixup()
133 			reg_val|PIIX4_FUNC1_IDETIM_PRIMARY_HI_IDE_DECODE_EN);  in malta_piix_func1_fixup()
135 			&reg_val);  in malta_piix_func1_fixup()
137 			reg_val|PIIX4_FUNC1_IDETIM_SECONDARY_HI_IDE_DECODE_EN);  in malta_piix_func1_fixup()