66 	int irq = 0;  in arch_setup_msi_irq()  local
121 		for (irq = 0; irq < 64; irq += irq_step) {  in arch_setup_msi_irq()
122 			if ((msi_free_irq_bitmask[index] & (search_mask << irq)) == 0) {  in arch_setup_msi_irq()
123 				msi_free_irq_bitmask[index] |= search_mask << irq;  in arch_setup_msi_irq()
124 				msi_multiple_irq_bitmask[index] |= (search_mask >> 1) << irq;  in arch_setup_msi_irq()
133 	if (irq >= 64) {  in arch_setup_msi_irq()
144 	irq += index*64;  in arch_setup_msi_irq()
145 	irq += OCTEON_IRQ_MSI_BIT0;  in arch_setup_msi_irq()
173 	msg.data = irq - OCTEON_IRQ_MSI_BIT0;  in arch_setup_msi_irq()
180 	irq_set_msi_desc(irq, desc);  in arch_setup_msi_irq()
181 	pci_write_msi_msg(irq, &msg);  in arch_setup_msi_irq()
220 void arch_teardown_msi_irq(unsigned int irq)  in arch_teardown_msi_irq()  argument
227 	if ((irq < OCTEON_IRQ_MSI_BIT0)  in arch_teardown_msi_irq()
228 		|| (irq > msi_irq_size + OCTEON_IRQ_MSI_BIT0))  in arch_teardown_msi_irq()
230 		      "MSI interrupt (%d)", irq);  in arch_teardown_msi_irq()
232 	irq -= OCTEON_IRQ_MSI_BIT0;  in arch_teardown_msi_irq()
233 	index = irq / 64;  in arch_teardown_msi_irq()
234 	irq0 = irq % 64;  in arch_teardown_msi_irq()
253 		      "interrupt (%d) not in use", irq);  in arch_teardown_msi_irq()
271 	int msi_number = data->irq - OCTEON_IRQ_MSI_BIT0;  in octeon_irq_msi_enable_pcie()
287 	int msi_number = data->irq - OCTEON_IRQ_MSI_BIT0;  in octeon_irq_msi_disable_pcie()
333 	int irq;  in __octeon_msi_do_interrupt()  local
342 		irq = bit + OCTEON_IRQ_MSI_BIT0 + 64 * index;  in __octeon_msi_do_interrupt()
343 		do_IRQ(irq);  in __octeon_msi_do_interrupt()
369 	int irq;  in octeon_msi_initialize()  local
395 	for (irq = OCTEON_IRQ_MSI_BIT0; irq <= OCTEON_IRQ_MSI_LAST; irq++)  in octeon_msi_initialize()
396 		irq_set_chip_and_handler(irq, msi, handle_simple_irq);  in octeon_msi_initialize()