134 	struct xlp_msi_data *md = irq_data_get_irq_handler_data(d);  in xlp_msi_enable()  local
139 	spin_lock_irqsave(&md->msi_lock, flags);  in xlp_msi_enable()
140 	md->msi_enabled_mask |= 1u << vec;  in xlp_msi_enable()
142 		nlm_write_reg(md->lnkbase, PCIE_9XX_MSI_EN,  in xlp_msi_enable()
143 				md->msi_enabled_mask);  in xlp_msi_enable()
145 		nlm_write_reg(md->lnkbase, PCIE_MSI_EN, md->msi_enabled_mask);  in xlp_msi_enable()
146 	spin_unlock_irqrestore(&md->msi_lock, flags);  in xlp_msi_enable()
151 	struct xlp_msi_data *md = irq_data_get_irq_handler_data(d);  in xlp_msi_disable()  local
156 	spin_lock_irqsave(&md->msi_lock, flags);  in xlp_msi_disable()
157 	md->msi_enabled_mask &= ~(1u << vec);  in xlp_msi_disable()
159 		nlm_write_reg(md->lnkbase, PCIE_9XX_MSI_EN,  in xlp_msi_disable()
160 				md->msi_enabled_mask);  in xlp_msi_disable()
162 		nlm_write_reg(md->lnkbase, PCIE_MSI_EN, md->msi_enabled_mask);  in xlp_msi_disable()
163 	spin_unlock_irqrestore(&md->msi_lock, flags);  in xlp_msi_disable()
168 	struct xlp_msi_data *md = irq_data_get_irq_handler_data(d);  in xlp_msi_mask_ack()  local
177 		nlm_write_reg(md->lnkbase, PCIE_9XX_MSI_STATUS, 1u << vec);  in xlp_msi_mask_ack()
179 		nlm_write_reg(md->lnkbase, PCIE_MSI_STATUS, 1u << vec);  in xlp_msi_mask_ack()
207 	struct xlp_msi_data *md;  in xlp_msix_mask_ack()  local
214 	md = irq_data_get_irq_handler_data(d);  in xlp_msix_mask_ack()
224 	nlm_write_reg(md->lnkbase, status_reg, 1u << bit);  in xlp_msix_mask_ack()
227 		nlm_pic_ack(md->node->picbase,  in xlp_msix_mask_ack()
296 	struct xlp_msi_data *md;  in xlp_setup_msi()  local
305 	md = irq_get_handler_data(xirq);  in xlp_setup_msi()
308 	spin_lock_irqsave(&md->msi_lock, flags);  in xlp_setup_msi()
309 	if (md->msi_alloc_mask == 0) {  in xlp_setup_msi()
322 	msivec = fls(md->msi_alloc_mask);  in xlp_setup_msi()
324 		spin_unlock_irqrestore(&md->msi_lock, flags);  in xlp_setup_msi()
327 	md->msi_alloc_mask |= (1u << msivec);  in xlp_setup_msi()
328 	spin_unlock_irqrestore(&md->msi_lock, flags);  in xlp_setup_msi()
403 	struct xlp_msi_data *md;  in xlp_setup_msix()  local
412 	md = irq_get_handler_data(xirq);  in xlp_setup_msix()
415 	spin_lock_irqsave(&md->msi_lock, flags);  in xlp_setup_msix()
417 	if (md->msix_alloc_mask == 0)  in xlp_setup_msix()
421 	t = fls(md->msix_alloc_mask);  in xlp_setup_msix()
423 		spin_unlock_irqrestore(&md->msi_lock, flags);  in xlp_setup_msix()
426 	md->msix_alloc_mask |= (1u << t);  in xlp_setup_msix()
427 	spin_unlock_irqrestore(&md->msi_lock, flags);  in xlp_setup_msix()
469 	struct xlp_msi_data *md;  in xlp_init_node_msi_irqs()  local
476 	md = kzalloc(sizeof(*md), GFP_KERNEL);  in xlp_init_node_msi_irqs()
477 	spin_lock_init(&md->msi_lock);  in xlp_init_node_msi_irqs()
478 	md->msi_enabled_mask = 0;  in xlp_init_node_msi_irqs()
479 	md->msi_alloc_mask = 0;  in xlp_init_node_msi_irqs()
480 	md->msix_alloc_mask = 0;  in xlp_init_node_msi_irqs()
481 	md->node = nodep;  in xlp_init_node_msi_irqs()
482 	md->lnkbase = nlm_get_pcie_base(node, link);  in xlp_init_node_msi_irqs()
488 		irq_set_handler_data(i, md);  in xlp_init_node_msi_irqs()
495 			nlm_write_pcie_reg(md->lnkbase, PCIE_9XX_MSIX_VECX(i +  in xlp_init_node_msi_irqs()
511 		irq_set_handler_data(irq, md);  in xlp_init_node_msi_irqs()
517 	struct xlp_msi_data *md;  in nlm_dispatch_msi()  local
523 	md = irq_get_handler_data(irqbase);  in nlm_dispatch_msi()
525 		status = nlm_read_reg(md->lnkbase, PCIE_9XX_MSI_STATUS) &  in nlm_dispatch_msi()
526 						md->msi_enabled_mask;  in nlm_dispatch_msi()
528 		status = nlm_read_reg(md->lnkbase, PCIE_MSI_STATUS) &  in nlm_dispatch_msi()
529 						md->msi_enabled_mask;  in nlm_dispatch_msi()
539 		nlm_pic_ack(md->node->picbase,  in nlm_dispatch_msi()
542 		nlm_pic_ack(md->node->picbase, PIC_IRT_PCIE_LINK_INDEX(link));  in nlm_dispatch_msi()
547 	struct xlp_msi_data *md;  in nlm_dispatch_msix()  local
553 	md = irq_get_handler_data(irqbase);  in nlm_dispatch_msix()
555 		status = nlm_read_reg(md->lnkbase, PCIE_9XX_MSIX_STATUSX(link));  in nlm_dispatch_msix()
557 		status = nlm_read_reg(md->lnkbase, PCIE_MSIX_STATUS);  in nlm_dispatch_msix()