543 	out_be64(&priv2->spu_privcntl_RW, 0UL);  in reset_spu_privcntl()
632 	u64 idx, ch_indices[] = { 0UL, 3UL, 4UL, 24UL, 25UL, 27UL };  in save_ch_part1()
649 		out_be64(&priv2->spu_chnldata_RW, 0UL);  in save_ch_part1()
650 		out_be64(&priv2->spu_chnlcnt_RW, 0UL);  in save_ch_part1()
669 	out_be64(&priv2->spu_chnlcnt_RW, 0UL);  in save_spu_mb()
1082 	u64 ch_indices[] = { 0UL, 3UL, 4UL, 24UL, 25UL, 27UL };  in reset_ch_part1()
1091 	out_be64(&priv2->spu_chnldata_RW, 0UL);  in reset_ch_part1()
1098 		out_be64(&priv2->spu_chnldata_RW, 0UL);  in reset_ch_part1()
1099 		out_be64(&priv2->spu_chnlcnt_RW, 0UL);  in reset_ch_part1()
1108 	u64 ch_counts[5] = { 16UL, 1UL, 1UL, 0UL, 1UL };  in reset_ch_part2()
1574 	u64 idx, ch_indices[] = { 0UL, 3UL, 4UL, 24UL, 25UL, 27UL };  in restore_ch_part1()
1689 	u64 dummy = 0UL;  in check_ppuint_mb_stat()