Lines Matching refs:hose
66 static int fsl_pcie_check_link(struct pci_controller *hose) in fsl_pcie_check_link() argument
70 if (hose->indirect_type & PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK) { in fsl_pcie_check_link()
71 if (hose->ops->read == fsl_indirect_read_config) in fsl_pcie_check_link()
72 __indirect_read_config(hose, hose->first_busno, 0, in fsl_pcie_check_link()
75 early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val); in fsl_pcie_check_link()
79 struct ccsr_pci __iomem *pci = hose->private_data; in fsl_pcie_check_link()
93 struct pci_controller *hose = pci_bus_to_host(bus); in fsl_indirect_read_config() local
95 if (fsl_pcie_check_link(hose)) in fsl_indirect_read_config()
96 hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK; in fsl_indirect_read_config()
98 hose->indirect_type &= ~PPC_INDIRECT_TYPE_NO_PCIE_LINK; in fsl_indirect_read_config()
115 static void setup_swiotlb_ops(struct pci_controller *hose) in setup_swiotlb_ops() argument
118 hose->controller_ops.dma_dev_setup = pci_dma_dev_setup_swiotlb; in setup_swiotlb_ops()
123 static inline void setup_swiotlb_ops(struct pci_controller *hose) {} in setup_swiotlb_ops() argument
183 static void setup_pci_atmu(struct pci_controller *hose) in setup_pci_atmu() argument
185 struct ccsr_pci __iomem *pci = hose->private_data; in setup_pci_atmu()
192 const char *name = hose->dn->full_name; in setup_pci_atmu()
196 if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) { in setup_pci_atmu()
212 if (!(hose->mem_resources[i].flags & IORESOURCE_MEM)) in setup_pci_atmu()
215 paddr_lo = min(paddr_lo, (u64)hose->mem_resources[i].start); in setup_pci_atmu()
216 paddr_hi = max(paddr_hi, (u64)hose->mem_resources[i].end); in setup_pci_atmu()
219 offset = hose->mem_offset[i]; in setup_pci_atmu()
220 n = setup_one_atmu(pci, j, &hose->mem_resources[i], offset); in setup_pci_atmu()
224 hose->mem_resources[i].flags |= IORESOURCE_DISABLED; in setup_pci_atmu()
230 if (hose->io_resource.flags & IORESOURCE_IO) { in setup_pci_atmu()
236 (u64)hose->io_resource.start, in setup_pci_atmu()
237 (u64)resource_size(&hose->io_resource), in setup_pci_atmu()
238 (u64)hose->io_base_phys); in setup_pci_atmu()
239 out_be32(&pci->pow[j].potar, (hose->io_resource.start >> 12)); in setup_pci_atmu()
241 out_be32(&pci->pow[j].powbar, (hose->io_base_phys >> 12)); in setup_pci_atmu()
244 | (ilog2(hose->io_resource.end in setup_pci_atmu()
245 - hose->io_resource.start + 1) - 1)); in setup_pci_atmu()
264 early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, 0xffffffff); in setup_pci_atmu()
265 early_read_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, &pcicsrbar_sz); in setup_pci_atmu()
273 early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, pcicsrbar); in setup_pci_atmu()
294 reg = of_get_property(hose->dn, "msi-address-64", &len); in setup_pci_atmu()
312 if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) { in setup_pci_atmu()
329 hose->dma_window_base_cur = 0x00000000; in setup_pci_atmu()
330 hose->dma_window_size = (resource_size_t)sz; in setup_pci_atmu()
386 hose->dma_window_base_cur = 0x00000000; in setup_pci_atmu()
387 hose->dma_window_size = (resource_size_t)paddr; in setup_pci_atmu()
390 if (hose->dma_window_size < mem) { in setup_pci_atmu()
406 (u64)hose->dma_window_size); in setup_pci_atmu()
410 static void __init setup_pci_cmd(struct pci_controller *hose) in setup_pci_cmd() argument
415 early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd); in setup_pci_cmd()
418 early_write_config_word(hose, 0, 0, PCI_COMMAND, cmd); in setup_pci_cmd()
420 cap_x = early_find_capability(hose, 0, 0, PCI_CAP_ID_PCIX); in setup_pci_cmd()
425 early_write_config_word(hose, 0, 0, pci_x_cmd, cmd); in setup_pci_cmd()
427 early_write_config_byte(hose, 0, 0, PCI_LATENCY_TIMER, 0x80); in setup_pci_cmd()
433 struct pci_controller *hose = pci_bus_to_host(bus); in fsl_pcibios_fixup_bus() local
445 is_pcie = early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP); in fsl_pcibios_fixup_bus()
446 no_link = !!(hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK); in fsl_pcibios_fixup_bus()
448 if (bus->parent == hose->bus && (is_pcie || no_link)) { in fsl_pcibios_fixup_bus()
456 par = &hose->io_resource; in fsl_pcibios_fixup_bus()
458 par = &hose->mem_resources[i-1]; in fsl_pcibios_fixup_bus()
471 struct pci_controller *hose; in fsl_add_bridge() local
500 hose = pcibios_alloc_controller(dev); in fsl_add_bridge()
501 if (!hose) in fsl_add_bridge()
505 hose->parent = &pdev->dev; in fsl_add_bridge()
506 hose->first_busno = bus_range ? bus_range[0] : 0x0; in fsl_add_bridge()
507 hose->last_busno = bus_range ? bus_range[1] : 0xff; in fsl_add_bridge()
512 pci = hose->private_data = ioremap(rsrc.start, resource_size(&rsrc)); in fsl_add_bridge()
513 if (!hose->private_data) in fsl_add_bridge()
516 setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4, in fsl_add_bridge()
520 hose->indirect_type |= PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK; in fsl_add_bridge()
522 if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) { in fsl_add_bridge()
524 hose->ops = &fsl_indirect_pcie_ops; in fsl_add_bridge()
526 early_read_config_byte(hose, 0, 0, PCI_HEADER_TYPE, &hdr_type); in fsl_add_bridge()
532 early_read_config_byte(hose, 0, 0, PCI_CLASS_PROG, &progif); in fsl_add_bridge()
538 setup_pci_cmd(hose); in fsl_add_bridge()
541 if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) { in fsl_add_bridge()
542 hose->indirect_type |= PPC_INDIRECT_TYPE_EXT_REG | in fsl_add_bridge()
544 if (fsl_pcie_check_link(hose)) in fsl_add_bridge()
545 hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK; in fsl_add_bridge()
550 (unsigned long long)rsrc.start, hose->first_busno, in fsl_add_bridge()
551 hose->last_busno); in fsl_add_bridge()
554 hose, hose->cfg_addr, hose->cfg_data); in fsl_add_bridge()
558 pci_process_bridge_OF_ranges(hose, dev, is_primary); in fsl_add_bridge()
561 setup_pci_atmu(hose); in fsl_add_bridge()
564 setup_swiotlb_ops(hose); in fsl_add_bridge()
569 iounmap(hose->private_data); in fsl_add_bridge()
571 if (((unsigned long)hose->cfg_data & PAGE_MASK) != in fsl_add_bridge()
572 ((unsigned long)hose->cfg_addr & PAGE_MASK)) in fsl_add_bridge()
573 iounmap(hose->cfg_data); in fsl_add_bridge()
574 iounmap(hose->cfg_addr); in fsl_add_bridge()
575 pcibios_free_controller(hose); in fsl_add_bridge()
609 struct pci_controller *hose = pci_bus_to_host(bus); in mpc83xx_pcie_exclude_device() local
611 if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) in mpc83xx_pcie_exclude_device()
618 if (bus->number == hose->first_busno || in mpc83xx_pcie_exclude_device()
619 bus->primary == hose->first_busno) { in mpc83xx_pcie_exclude_device()
625 if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) in mpc83xx_pcie_exclude_device()
635 struct pci_controller *hose = pci_bus_to_host(bus); in mpc83xx_pcie_remap_cfg() local
636 struct mpc83xx_pcie_priv *pcie = hose->dn->data; in mpc83xx_pcie_remap_cfg()
647 if (bus->number == hose->first_busno) in mpc83xx_pcie_remap_cfg()
663 struct pci_controller *hose = pci_bus_to_host(bus); in mpc83xx_pcie_write_config() local
666 if (offset == PCI_PRIMARY_BUS && bus->number == hose->first_busno) in mpc83xx_pcie_write_config()
678 static int __init mpc83xx_pcie_setup(struct pci_controller *hose, in mpc83xx_pcie_setup() argument
704 WARN_ON(hose->dn->data); in mpc83xx_pcie_setup()
705 hose->dn->data = pcie; in mpc83xx_pcie_setup()
706 hose->ops = &mpc83xx_pcie_ops; in mpc83xx_pcie_setup()
707 hose->indirect_type |= PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK; in mpc83xx_pcie_setup()
712 if (fsl_pcie_check_link(hose)) in mpc83xx_pcie_setup()
713 hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK; in mpc83xx_pcie_setup()
728 struct pci_controller *hose; in mpc83xx_add_bridge() local
781 hose = pcibios_alloc_controller(dev); in mpc83xx_add_bridge()
782 if (!hose) in mpc83xx_add_bridge()
785 hose->first_busno = bus_range ? bus_range[0] : 0; in mpc83xx_add_bridge()
786 hose->last_busno = bus_range ? bus_range[1] : 0xff; in mpc83xx_add_bridge()
789 ret = mpc83xx_pcie_setup(hose, &rsrc_reg); in mpc83xx_add_bridge()
793 setup_indirect_pci(hose, rsrc_cfg.start, in mpc83xx_add_bridge()
799 (unsigned long long)rsrc_reg.start, hose->first_busno, in mpc83xx_add_bridge()
800 hose->last_busno); in mpc83xx_add_bridge()
803 hose, hose->cfg_addr, hose->cfg_data); in mpc83xx_add_bridge()
807 pci_process_bridge_OF_ranges(hose, dev, primary); in mpc83xx_add_bridge()
811 pcibios_free_controller(hose); in mpc83xx_add_bridge()
816 u64 fsl_pci_immrbar_base(struct pci_controller *hose) in fsl_pci_immrbar_base() argument
820 struct mpc83xx_pcie_priv *pcie = hose->dn->data; in fsl_pci_immrbar_base()
844 pci_bus_read_config_dword(hose->bus, in fsl_pci_immrbar_base()
962 struct pci_controller *hose; in is_in_pci_mem_space() local
966 list_for_each_entry(hose, &hose_list, list_node) { in is_in_pci_mem_space()
967 if (!(hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG)) in is_in_pci_mem_space()
971 res = &hose->mem_resources[i]; in is_in_pci_mem_space()
1075 struct pci_controller *hose = dev_id; in fsl_pci_pme_handle() local
1076 struct ccsr_pci __iomem *pci = hose->private_data; in fsl_pci_pme_handle()
1088 static int fsl_pci_pme_probe(struct pci_controller *hose) in fsl_pci_pme_probe() argument
1097 dev = list_first_entry(&hose->bus->devices, typeof(*dev), bus_list); in fsl_pci_pme_probe()
1104 pme_irq = irq_of_parse_and_map(hose->dn, 0); in fsl_pci_pme_probe()
1111 res = devm_request_irq(hose->parent, pme_irq, in fsl_pci_pme_probe()
1114 "[PCI] PME", hose); in fsl_pci_pme_probe()
1122 pci = hose->private_data; in fsl_pci_pme_probe()
1140 static void send_pme_turnoff_message(struct pci_controller *hose) in send_pme_turnoff_message() argument
1142 struct ccsr_pci __iomem *pci = hose->private_data; in send_pme_turnoff_message()
1161 static void fsl_pci_syscore_do_suspend(struct pci_controller *hose) in fsl_pci_syscore_do_suspend() argument
1163 send_pme_turnoff_message(hose); in fsl_pci_syscore_do_suspend()
1168 struct pci_controller *hose, *tmp; in fsl_pci_syscore_suspend() local
1170 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) in fsl_pci_syscore_suspend()
1171 fsl_pci_syscore_do_suspend(hose); in fsl_pci_syscore_suspend()
1176 static void fsl_pci_syscore_do_resume(struct pci_controller *hose) in fsl_pci_syscore_do_resume() argument
1178 struct ccsr_pci __iomem *pci = hose->private_data; in fsl_pci_syscore_do_resume()
1196 setup_pci_atmu(hose); in fsl_pci_syscore_do_resume()
1201 struct pci_controller *hose, *tmp; in fsl_pci_syscore_resume() local
1203 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) in fsl_pci_syscore_resume()
1204 fsl_pci_syscore_do_resume(hose); in fsl_pci_syscore_resume()