Lines Matching refs:out_le32
86 out_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO, in mv64x60_mask_low()
99 out_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO, in mv64x60_unmask_low()
123 out_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI, in mv64x60_mask_high()
136 out_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI, in mv64x60_unmask_high()
160 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK, in mv64x60_mask_gpp()
173 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK, in mv64x60_mask_ack_gpp()
175 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_CAUSE, in mv64x60_mask_ack_gpp()
188 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK, in mv64x60_unmask_gpp()
257 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK, in mv64x60_init_irq()
259 out_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO, in mv64x60_init_irq()
261 out_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI, in mv64x60_init_irq()
264 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_CAUSE, 0); in mv64x60_init_irq()
265 out_le32(mv64x60_irq_reg_base + MV64X60_IC_MAIN_CAUSE_LO, 0); in mv64x60_init_irq()
266 out_le32(mv64x60_irq_reg_base + MV64X60_IC_MAIN_CAUSE_HI, 0); in mv64x60_init_irq()