1703 		out_le32((u32 *)(addr + offset), val);  in ppc4xx_pciex_write_config()
1748 		out_le32(mbase + PECFG_POM0LAH, pciah);  in ppc4xx_setup_one_pciex_POM()
1749 		out_le32(mbase + PECFG_POM0LAL, pcial);  in ppc4xx_setup_one_pciex_POM()
1771 		out_le32(mbase + PECFG_POM1LAH, pciah);  in ppc4xx_setup_one_pciex_POM()
1772 		out_le32(mbase + PECFG_POM1LAL, pcial);  in ppc4xx_setup_one_pciex_POM()
1780 		out_le32(mbase + PECFG_POM2LAH, pciah);  in ppc4xx_setup_one_pciex_POM()
1781 		out_le32(mbase + PECFG_POM2LAL, pcial);  in ppc4xx_setup_one_pciex_POM()
1870 		out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));  in ppc4xx_configure_pciex_PIMs()
1871 		out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) |  in ppc4xx_configure_pciex_PIMs()
1875 		out_le32(mbase + PECFG_BAR1MPA, 0);  in ppc4xx_configure_pciex_PIMs()
1876 		out_le32(mbase + PECFG_BAR2HMPA, 0);  in ppc4xx_configure_pciex_PIMs()
1877 		out_le32(mbase + PECFG_BAR2LMPA, 0);  in ppc4xx_configure_pciex_PIMs()
1879 		out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa));  in ppc4xx_configure_pciex_PIMs()
1880 		out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa));  in ppc4xx_configure_pciex_PIMs()
1882 		out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr));  in ppc4xx_configure_pciex_PIMs()
1883 		out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr));  in ppc4xx_configure_pciex_PIMs()
1897 		out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));  in ppc4xx_configure_pciex_PIMs()
1898 		out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));  in ppc4xx_configure_pciex_PIMs()
1903 		out_le32(mbase + PECFG_PIM0LAL, 0x00000000);  in ppc4xx_configure_pciex_PIMs()
1904 		out_le32(mbase + PECFG_PIM0LAH, 0x00000000);  in ppc4xx_configure_pciex_PIMs()
1905 		out_le32(mbase + PECFG_PIM1LAL, 0x00000000);  in ppc4xx_configure_pciex_PIMs()
1906 		out_le32(mbase + PECFG_PIM1LAH, 0x00000000);  in ppc4xx_configure_pciex_PIMs()
1907 		out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);  in ppc4xx_configure_pciex_PIMs()
1908 		out_le32(mbase + PECFG_PIM01SAL, 0x00000000);  in ppc4xx_configure_pciex_PIMs()
1910 		out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));  in ppc4xx_configure_pciex_PIMs()
1911 		out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));  in ppc4xx_configure_pciex_PIMs()
1915 	out_le32(mbase + PECFG_PIMEN, 0x1);  in ppc4xx_configure_pciex_PIMs()
2013 	out_le32(mbase + PECFG_PIMEN, 0);  in ppc4xx_pciex_port_setup_hose()
2064 		out_le32(mbase + 0x208, 0x06040001);  in ppc4xx_pciex_port_setup_hose()
2070 		out_le32(mbase + 0x208, 0x0b200001);  in ppc4xx_pciex_port_setup_hose()