Lines Matching refs:r13
34 basr %r13,0 # get base register
38 la %r9,.LextpswS1-.LbaseS1(%r13)
42 la %r9,.LextpswS1_64-.LbaseS1(%r13)
44 mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8)
54 stck .LtimeS1-.LbaseS1(%r13) # initiate timeout
55 al %r2,.LtimeS1-.LbaseS1(%r13)
56 st %r2,.LtimeS1-.LbaseS1(%r13)
57 sckc .LtimeS1-.LbaseS1(%r13)
60 stctl %c0,%c0,.LctlS1-.LbaseS1(%r13) # enable required interrupts
61 l %r0,.LctlS1-.LbaseS1(%r13)
65 st %r1,.LctlS1-.LbaseS1(%r13)
66 lctl %c0,%c0,.LctlS1-.LbaseS1(%r13)
67 st %r0,.LctlS1-.LbaseS1(%r13)
70 lpsw .LwaitpswS1-.LbaseS1(%r13) # wait until interrupt
80 lctl %c0,%c0,.LctlS1-.LbaseS1(%r13) # restore interrupt setting
82 mvc 0(16,%r8),.LoldpswS1-.LbaseS1(%r13)
147 basr %r13,0 # get base register
149 l %r6,.LsccbS0-.LbaseS3(%r13) # prepare init mask sccb
150 mvc 0(.LinitendS3-.LinitsccbS3,%r6),.LinitsccbS3-.LbaseS3(%r13)
156 l %r2,.LwritemaskS3-.LbaseS3(%r13)# get command word
207 basr %r13,0 # get base register
209 l %r8,.LsccbS0-.LbaseS4(%r13) # prepare write data sccb
210 mvc 0(.LmtoS4-.LwritesccbS4,%r8),.LwritesccbS4-.LbaseS4(%r13)
213 l %r10,.Lascebc-.LbaseS4(%r13) # address of translation table
216 mvc 0(.LmtoendS4-.LmtoS4,%r7),.LmtoS4-.LbaseS4(%r13)
244 l %r2,.LwritedataS4-.LbaseS4(%r13)# write data
273 basr %r13,0
274 lmh %r0,%r15,.Lzeroes-.(%r13) # clear upper register halves