Lines Matching refs:csr_core
92 void __iomem *csr_core; /* Core CSR address of IP */ member
580 writel(0, ctx->csr_core + INTSTATUSMASK); in xgene_ahci_hw_init()
581 val = readl(ctx->csr_core + INTSTATUSMASK); /* Force a barrier */ in xgene_ahci_hw_init()
585 writel(0x0, ctx->csr_core + ERRINTSTATUSMASK); in xgene_ahci_hw_init()
586 readl(ctx->csr_core + ERRINTSTATUSMASK); /* Force a barrier */ in xgene_ahci_hw_init()
591 writel(0xffffffff, ctx->csr_core + SLVRDERRATTRIBUTES); in xgene_ahci_hw_init()
592 writel(0xffffffff, ctx->csr_core + SLVWRERRATTRIBUTES); in xgene_ahci_hw_init()
593 writel(0xffffffff, ctx->csr_core + MSTRDERRATTRIBUTES); in xgene_ahci_hw_init()
594 writel(0xffffffff, ctx->csr_core + MSTWRERRATTRIBUTES); in xgene_ahci_hw_init()
597 val = readl(ctx->csr_core + BUSCTLREG); in xgene_ahci_hw_init()
600 writel(val, ctx->csr_core + BUSCTLREG); in xgene_ahci_hw_init()
602 val = readl(ctx->csr_core + IOFMSTRWAUX); in xgene_ahci_hw_init()
605 writel(val, ctx->csr_core + IOFMSTRWAUX); in xgene_ahci_hw_init()
606 val = readl(ctx->csr_core + IOFMSTRWAUX); in xgene_ahci_hw_init()
654 ctx->csr_core = devm_ioremap_resource(dev, res); in xgene_ahci_probe()
655 if (IS_ERR(ctx->csr_core)) in xgene_ahci_probe()
656 return PTR_ERR(ctx->csr_core); in xgene_ahci_probe()
680 dev_dbg(dev, "VAddr 0x%p Mmio VAddr 0x%p\n", ctx->csr_core, in xgene_ahci_probe()