140 	val = clk_readl(divider->reg) >> divider->shift;  in clk_divider_recalc_rate()
352 		bestdiv = readl(divider->reg) >> divider->shift;  in clk_divider_round_rate()
394 		val = div_mask(divider->width) << (divider->shift + 16);  in clk_divider_set_rate()
397 		val &= ~(div_mask(divider->width) << divider->shift);  in clk_divider_set_rate()
399 	val |= value << divider->shift;  in clk_divider_set_rate()
417 		void __iomem *reg, u8 shift, u8 width,  in _register_divider()  argument
426 		if (width + shift > 16) {  in _register_divider()
447 	div->shift = shift;  in _register_divider()
477 		void __iomem *reg, u8 shift, u8 width,  in clk_register_divider()  argument
480 	return _register_divider(dev, name, parent_name, flags, reg, shift,  in clk_register_divider()
501 		void __iomem *reg, u8 shift, u8 width,  in clk_register_divider_table()  argument
505 	return _register_divider(dev, name, parent_name, flags, reg, shift,  in clk_register_divider_table()