clk-pll.c - OpenGrok cross reference for /linux-4.1.27/drivers/clk/rockchip/clk-pll.c

Lines Matching refs:RK3066_PLLCON
117 #define RK3066_PLLCON(i)		(i * 0x4)  macro
137 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_recalc_rate()
144 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(1));  in rockchip_rk3066_pll_recalc_rate()
147 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(0));  in rockchip_rk3066_pll_recalc_rate()
199 	       pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_set_rate()
206 	       pll->reg_base + RK3066_PLLCON(0));  in rockchip_rk3066_pll_set_rate()
210 		       pll->reg_base + RK3066_PLLCON(1));  in rockchip_rk3066_pll_set_rate()
213 		       pll->reg_base + RK3066_PLLCON(2));  in rockchip_rk3066_pll_set_rate()
217 	       pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_set_rate()
239 	       pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_enable()
250 	       pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_disable()
256 	u32 pllcon = readl(pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_is_enabled()
279 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(0));  in rockchip_rk3066_pll_init()
283 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(1));  in rockchip_rk3066_pll_init()
286 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(2));  in rockchip_rk3066_pll_init()