135 	u32 pllcon;  in rockchip_rk3066_pll_recalc_rate()  local
137 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_recalc_rate()
138 	if (pllcon & RK3066_PLLCON3_BYPASS) {  in rockchip_rk3066_pll_recalc_rate()
144 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(1));  in rockchip_rk3066_pll_recalc_rate()
145 	nf = (pllcon >> RK3066_PLLCON1_NF_SHIFT) & RK3066_PLLCON1_NF_MASK;  in rockchip_rk3066_pll_recalc_rate()
147 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(0));  in rockchip_rk3066_pll_recalc_rate()
148 	nr = (pllcon >> RK3066_PLLCON0_NR_SHIFT) & RK3066_PLLCON0_NR_MASK;  in rockchip_rk3066_pll_recalc_rate()
149 	no = (pllcon >> RK3066_PLLCON0_OD_SHIFT) & RK3066_PLLCON0_OD_MASK;  in rockchip_rk3066_pll_recalc_rate()
256 	u32 pllcon = readl(pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_is_enabled()  local
258 	return !(pllcon & RK3066_PLLCON3_PWRDOWN);  in rockchip_rk3066_pll_is_enabled()
267 	u32 pllcon;  in rockchip_rk3066_pll_init()  local
279 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(0));  in rockchip_rk3066_pll_init()
280 	nr = ((pllcon >> RK3066_PLLCON0_NR_SHIFT) & RK3066_PLLCON0_NR_MASK) + 1;  in rockchip_rk3066_pll_init()
281 	no = ((pllcon >> RK3066_PLLCON0_OD_SHIFT) & RK3066_PLLCON0_OD_MASK) + 1;  in rockchip_rk3066_pll_init()
283 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(1));  in rockchip_rk3066_pll_init()
284 	nf = ((pllcon >> RK3066_PLLCON1_NF_SHIFT) & RK3066_PLLCON1_NF_MASK) + 1;  in rockchip_rk3066_pll_init()
286 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(2));  in rockchip_rk3066_pll_init()
287 	bwadj = (pllcon >> RK3066_PLLCON2_BWADJ_SHIFT) & RK3066_PLLCON2_BWADJ_MASK;  in rockchip_rk3066_pll_init()