Lines Matching refs:RK2928_CLKSEL_CON
117 .reg = RK2928_CLKSEL_CON(0), \
123 .reg = RK2928_CLKSEL_CON(1), \
154 .core_reg = RK2928_CLKSEL_CON(0),
165 .reg = RK2928_CLKSEL_CON(1), \
190 .core_reg = RK2928_CLKSEL_CON(0),
257 RK2928_CLKSEL_CON(0), 6, 2, DFLAGS | CLK_DIVIDER_READ_ONLY,
261 RK2928_CLKSEL_CON(32), 7, 1, MFLAGS, 0, 5, DFLAGS,
266 RK2928_CLKSEL_CON(32), 15, 1, MFLAGS, 8, 5, DFLAGS,
274 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
288 RK2928_CLKSEL_CON(31), 7, 1, MFLAGS, 0, 5, DFLAGS,
291 RK2928_CLKSEL_CON(31), 15, 1, MFLAGS, 8, 5, DFLAGS,
297 RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
300 RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
304 RK2928_CLKSEL_CON(29), 0, 1, MFLAGS),
306 RK2928_CLKSEL_CON(29), 1, 5, DFLAGS,
309 RK2928_CLKSEL_CON(29), 7, 1, MFLAGS),
324 RK2928_CLKSEL_CON(21), 0, 1, MFLAGS, 8, 5, DFLAGS,
327 RK2928_CLKSEL_CON(21), 4, 1, MFLAGS),
332 RK2928_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
335 RK2928_CLKSEL_CON(23), 0,
338 RK2928_CLKSEL_CON(22), 4, 2, MFLAGS),
341 RK2928_CLKSEL_CON(24), 8, 8, DFLAGS,
345 RK2928_CLKSEL_CON(5), 0, 7, DFLAGS,
348 RK2928_CLKSEL_CON(9), 0,
351 RK2928_CLKSEL_CON(5), 8, 2, MFLAGS),
361 RK2928_CLKSEL_CON(25), 0, 7, DFLAGS,
364 RK2928_CLKSEL_CON(25), 8, 7, DFLAGS,
368 RK2928_CLKSEL_CON(11), 0, 6, DFLAGS,
371 RK2928_CLKSEL_CON(12), 0, 6, DFLAGS,
374 RK2928_CLKSEL_CON(12), 8, 6, DFLAGS,
378 RK2928_CLKSEL_CON(12), 15, 1, MFLAGS),
380 RK2928_CLKSEL_CON(13), 0, 7, DFLAGS,
383 RK2928_CLKSEL_CON(17), 0,
386 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS),
388 RK2928_CLKSEL_CON(14), 0, 7, DFLAGS,
391 RK2928_CLKSEL_CON(18), 0,
394 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS),
396 RK2928_CLKSEL_CON(15), 0, 7, DFLAGS,
399 RK2928_CLKSEL_CON(19), 0,
402 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS),
404 RK2928_CLKSEL_CON(16), 0, 7, DFLAGS,
407 RK2928_CLKSEL_CON(20), 0,
410 RK2928_CLKSEL_CON(16), 8, 2, MFLAGS),
522 RK2928_CLKSEL_CON(1), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY, div_aclk_cpu_t),
524 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
527 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
530 RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
538 RK2928_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
542 RK2928_CLKSEL_CON(27), 0, 1, MFLAGS, 8, 8, DFLAGS,
545 RK2928_CLKSEL_CON(27), 4, 1, MFLAGS),
547 RK2928_CLKSEL_CON(28), 0, 1, MFLAGS, 8, 8, DFLAGS,
550 RK2928_CLKSEL_CON(28), 4, 1, MFLAGS),
553 RK2928_CLKSEL_CON(29), 8, 5, DFLAGS,
556 RK2928_CLKSEL_CON(29), 15, 1, MFLAGS),
562 RK2928_CLKSEL_CON(33), 8, 1, MFLAGS, 0, 5, DFLAGS,
571 RK2928_CLKSEL_CON(34), 0, 16, DFLAGS,
575 RK2928_CLKSEL_CON(2), 15, 1, MFLAGS),
577 RK2928_CLKSEL_CON(2), 0, 7, DFLAGS,
580 RK2928_CLKSEL_CON(6), 0,
583 RK2928_CLKSEL_CON(2), 8, 2, MFLAGS),
585 RK2928_CLKSEL_CON(3), 0, 7, DFLAGS,
588 RK2928_CLKSEL_CON(7), 0,
591 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS),
593 RK2928_CLKSEL_CON(4), 0, 7, DFLAGS,
596 RK2928_CLKSEL_CON(8), 0,
599 RK2928_CLKSEL_CON(4), 8, 2, MFLAGS),
635 RK2928_CLKSEL_CON(1), 3, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
640 RK2928_CLKSEL_CON(0), 5, 1, MFLAGS, 0, 5, DFLAGS),
642 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
644 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
646 RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
653 RK2928_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
657 RK2928_CLKSEL_CON(27), 0, 1, MFLAGS, 8, 8, DFLAGS,
660 RK2928_CLKSEL_CON(28), 0, 1, MFLAGS, 8, 8, DFLAGS,
664 RK2928_CLKSEL_CON(34), 7, 1, MFLAGS, 0, 5, DFLAGS,
676 RK2928_CLKSEL_CON(30), 0, 2, DFLAGS,
679 RK2928_CLKSEL_CON(11), 8, 6, DFLAGS),
682 RK2928_CLKSEL_CON(2), 15, 1, MFLAGS),
684 RK2928_CLKSEL_CON(3), 0, 7, DFLAGS,
687 RK2928_CLKSEL_CON(7), 0,
690 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS),