32 				struct samsung_clk_pll *pll, unsigned long rate)  in samsung_get_pll_settings()  argument
34 	const struct samsung_pll_rate_table  *rate_table = pll->rate_table;  in samsung_get_pll_settings()
37 	for (i = 0; i < pll->rate_count; i++) {  in samsung_get_pll_settings()
48 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll_round_rate()  local
49 	const struct samsung_pll_rate_table *rate_table = pll->rate_table;  in samsung_pll_round_rate()
53 	for (i = 0; i < pll->rate_count; i++) {  in samsung_pll_round_rate()
76 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll2126_recalc_rate()  local
80 	pll_con = __raw_readl(pll->con_reg);  in samsung_pll2126_recalc_rate()
109 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll3000_recalc_rate()  local
113 	pll_con = __raw_readl(pll->con_reg);  in samsung_pll3000_recalc_rate()
146 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll35xx_recalc_rate()  local
150 	pll_con = __raw_readl(pll->con_reg);  in samsung_pll35xx_recalc_rate()
175 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll35xx_set_rate()  local
180 	rate = samsung_get_pll_settings(pll, drate);  in samsung_pll35xx_set_rate()
187 	tmp = __raw_readl(pll->con_reg);  in samsung_pll35xx_set_rate()
193 		__raw_writel(tmp, pll->con_reg);  in samsung_pll35xx_set_rate()
200 			pll->lock_reg);  in samsung_pll35xx_set_rate()
209 	__raw_writel(tmp, pll->con_reg);  in samsung_pll35xx_set_rate()
214 		tmp = __raw_readl(pll->con_reg);  in samsung_pll35xx_set_rate()
249 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll36xx_recalc_rate()  local
254 	pll_con0 = __raw_readl(pll->con_reg);  in samsung_pll36xx_recalc_rate()
255 	pll_con1 = __raw_readl(pll->con_reg + 4);  in samsung_pll36xx_recalc_rate()
284 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll36xx_set_rate()  local
288 	rate = samsung_get_pll_settings(pll, drate);  in samsung_pll36xx_set_rate()
295 	pll_con0 = __raw_readl(pll->con_reg);  in samsung_pll36xx_set_rate()
296 	pll_con1 = __raw_readl(pll->con_reg + 4);  in samsung_pll36xx_set_rate()
302 		__raw_writel(pll_con0, pll->con_reg);  in samsung_pll36xx_set_rate()
308 	__raw_writel(rate->pdiv * PLL36XX_LOCK_FACTOR, pll->lock_reg);  in samsung_pll36xx_set_rate()
317 	__raw_writel(pll_con0, pll->con_reg);  in samsung_pll36xx_set_rate()
321 	__raw_writel(pll_con1, pll->con_reg + 4);  in samsung_pll36xx_set_rate()
326 		tmp = __raw_readl(pll->con_reg);  in samsung_pll36xx_set_rate()
363 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll45xx_recalc_rate()  local
367 	pll_con = __raw_readl(pll->con_reg);  in samsung_pll45xx_recalc_rate()
372 	if (pll->type == pll_4508)  in samsung_pll45xx_recalc_rate()
397 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll45xx_set_rate()  local
403 	rate = samsung_get_pll_settings(pll, drate);  in samsung_pll45xx_set_rate()
410 	con0 = __raw_readl(pll->con_reg);  in samsung_pll45xx_set_rate()
411 	con1 = __raw_readl(pll->con_reg + 0x4);  in samsung_pll45xx_set_rate()
417 		__raw_writel(con0, pll->con_reg);  in samsung_pll45xx_set_rate()
431 	con1 = __raw_readl(pll->con_reg + 0x4);  in samsung_pll45xx_set_rate()
436 	switch (pll->type) {  in samsung_pll45xx_set_rate()
438 		__raw_writel(rate->pdiv * PLL4502_LOCK_FACTOR, pll->lock_reg);  in samsung_pll45xx_set_rate()
441 		__raw_writel(rate->pdiv * PLL4508_LOCK_FACTOR, pll->lock_reg);  in samsung_pll45xx_set_rate()
448 	__raw_writel(con1, pll->con_reg + 0x4);  in samsung_pll45xx_set_rate()
449 	__raw_writel(con0, pll->con_reg);  in samsung_pll45xx_set_rate()
453 	while (!(__raw_readl(pll->con_reg) & PLL45XX_LOCKED)) {  in samsung_pll45xx_set_rate()
510 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll46xx_recalc_rate()  local
514 	pll_con0 = __raw_readl(pll->con_reg);  in samsung_pll46xx_recalc_rate()
515 	pll_con1 = __raw_readl(pll->con_reg + 4);  in samsung_pll46xx_recalc_rate()
516 	mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & ((pll->type == pll_1460x) ?  in samsung_pll46xx_recalc_rate()
520 	kdiv = pll->type == pll_4650c ? pll_con1 & PLL4650C_KDIV_MASK :  in samsung_pll46xx_recalc_rate()
523 	shift = ((pll->type == pll_4600) || (pll->type == pll_1460x)) ? 16 : 10;  in samsung_pll46xx_recalc_rate()
548 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll46xx_set_rate()  local
554 	rate = samsung_get_pll_settings(pll, drate);  in samsung_pll46xx_set_rate()
561 	con0 = __raw_readl(pll->con_reg);  in samsung_pll46xx_set_rate()
562 	con1 = __raw_readl(pll->con_reg + 0x4);  in samsung_pll46xx_set_rate()
568 		__raw_writel(con0, pll->con_reg);  in samsung_pll46xx_set_rate()
580 	if (pll->type == pll_1460x) {  in samsung_pll46xx_set_rate()
597 	con1 = __raw_readl(pll->con_reg + 0x4);  in samsung_pll46xx_set_rate()
606 	__raw_writel(lock, pll->lock_reg);  in samsung_pll46xx_set_rate()
607 	__raw_writel(con0, pll->con_reg);  in samsung_pll46xx_set_rate()
608 	__raw_writel(con1, pll->con_reg + 0x4);  in samsung_pll46xx_set_rate()
612 	while (!(__raw_readl(pll->con_reg) & PLL46XX_LOCKED)) {  in samsung_pll46xx_set_rate()
653 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll6552_recalc_rate()  local
657 	pll_con = __raw_readl(pll->con_reg);  in samsung_pll6552_recalc_rate()
658 	if (pll->type == pll_6552_s3c2416) {  in samsung_pll6552_recalc_rate()
693 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll6553_recalc_rate()  local
697 	pll_con0 = __raw_readl(pll->con_reg);  in samsung_pll6553_recalc_rate()
698 	pll_con1 = __raw_readl(pll->con_reg + 0x4);  in samsung_pll6553_recalc_rate()
731 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_s3c2410_pll_recalc_rate()  local
735 	pll_con = __raw_readl(pll->con_reg);  in samsung_s3c2410_pll_recalc_rate()
749 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_s3c2440_mpll_recalc_rate()  local
753 	pll_con = __raw_readl(pll->con_reg);  in samsung_s3c2440_mpll_recalc_rate()
767 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_s3c2410_pll_set_rate()  local
772 	rate = samsung_get_pll_settings(pll, drate);  in samsung_s3c2410_pll_set_rate()
779 	tmp = __raw_readl(pll->con_reg);  in samsung_s3c2410_pll_set_rate()
788 	__raw_writel(tmp, pll->con_reg);  in samsung_s3c2410_pll_set_rate()
798 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_s3c2410_pll_enable()  local
799 	u32 pll_en = __raw_readl(pll->lock_reg + PLLS3C2410_ENABLE_REG_OFFSET);  in samsung_s3c2410_pll_enable()
807 	__raw_writel(pll_en, pll->lock_reg + PLLS3C2410_ENABLE_REG_OFFSET);  in samsung_s3c2410_pll_enable()
902 	struct samsung_clk_pll2550x *pll = to_clk_pll2550x(hw);  in samsung_pll2550x_recalc_rate()  local
906 	pll_stat = __raw_readl(pll->reg_base + pll->offset * 3);  in samsung_pll2550x_recalc_rate()
928 	struct samsung_clk_pll2550x *pll;  in samsung_clk_register_pll2550x()  local
932 	pll = kzalloc(sizeof(*pll), GFP_KERNEL);  in samsung_clk_register_pll2550x()
933 	if (!pll) {  in samsung_clk_register_pll2550x()
944 	pll->hw.init = &init;  in samsung_clk_register_pll2550x()
945 	pll->reg_base = reg_base;  in samsung_clk_register_pll2550x()
946 	pll->offset = offset;  in samsung_clk_register_pll2550x()
948 	clk = clk_register(NULL, &pll->hw);  in samsung_clk_register_pll2550x()
952 		kfree(pll);  in samsung_clk_register_pll2550x()
980 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll2550xx_recalc_rate()  local
984 	pll_con = __raw_readl(pll->con_reg);  in samsung_pll2550xx_recalc_rate()
1008 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll2550xx_set_rate()  local
1013 	rate = samsung_get_pll_settings(pll, drate);  in samsung_pll2550xx_set_rate()
1020 	tmp = __raw_readl(pll->con_reg);  in samsung_pll2550xx_set_rate()
1026 		__raw_writel(tmp, pll->con_reg);  in samsung_pll2550xx_set_rate()
1032 	__raw_writel(rate->pdiv * PLL2550XX_LOCK_FACTOR, pll->lock_reg);  in samsung_pll2550xx_set_rate()
1041 	__raw_writel(tmp, pll->con_reg);  in samsung_pll2550xx_set_rate()
1046 		tmp = __raw_readl(pll->con_reg);  in samsung_pll2550xx_set_rate()
1085 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll2650xx_recalc_rate()  local
1090 	pll_con0 = __raw_readl(pll->con_reg);  in samsung_pll2650xx_recalc_rate()
1091 	pll_con2 = __raw_readl(pll->con_reg + 8);  in samsung_pll2650xx_recalc_rate()
1107 	struct samsung_clk_pll *pll = to_clk_pll(hw);  in samsung_pll2650xx_set_rate()  local
1111 	rate = samsung_get_pll_settings(pll, drate);  in samsung_pll2650xx_set_rate()
1118 	pll_con0 = __raw_readl(pll->con_reg);  in samsung_pll2650xx_set_rate()
1119 	pll_con2 = __raw_readl(pll->con_reg + 8);  in samsung_pll2650xx_set_rate()
1136 	__raw_writel(PLL2650XX_LOCK_FACTOR * rate->pdiv, pll->lock_reg);  in samsung_pll2650xx_set_rate()
1138 	__raw_writel(pll_con0, pll->con_reg);  in samsung_pll2650xx_set_rate()
1139 	__raw_writel(pll_con2, pll->con_reg + 8);  in samsung_pll2650xx_set_rate()
1142 		tmp = __raw_readl(pll->con_reg);  in samsung_pll2650xx_set_rate()
1162 	struct samsung_clk_pll *pll;  in _samsung_clk_register_pll()  local
1167 	pll = kzalloc(sizeof(*pll), GFP_KERNEL);  in _samsung_clk_register_pll()
1168 	if (!pll) {  in _samsung_clk_register_pll()
1184 		pll->rate_count = len;  in _samsung_clk_register_pll()
1185 		pll->rate_table = kmemdup(pll_clk->rate_table,  in _samsung_clk_register_pll()
1186 					pll->rate_count *  in _samsung_clk_register_pll()
1189 		WARN(!pll->rate_table,  in _samsung_clk_register_pll()
1207 		if (!pll->rate_table)  in _samsung_clk_register_pll()
1217 		if (!pll->rate_table)  in _samsung_clk_register_pll()
1225 		if (!pll->rate_table)  in _samsung_clk_register_pll()
1241 		if (!pll->rate_table)  in _samsung_clk_register_pll()
1247 		if (!pll->rate_table)  in _samsung_clk_register_pll()
1253 		if (!pll->rate_table)  in _samsung_clk_register_pll()
1259 		if (!pll->rate_table)  in _samsung_clk_register_pll()
1265 		if (!pll->rate_table)  in _samsung_clk_register_pll()
1271 		if (!pll->rate_table)  in _samsung_clk_register_pll()
1281 	pll->hw.init = &init;  in _samsung_clk_register_pll()
1282 	pll->type = pll_clk->type;  in _samsung_clk_register_pll()
1283 	pll->lock_reg = base + pll_clk->lock_offset;  in _samsung_clk_register_pll()
1284 	pll->con_reg = base + pll_clk->con_offset;  in _samsung_clk_register_pll()
1286 	clk = clk_register(NULL, &pll->hw);  in _samsung_clk_register_pll()
1290 		kfree(pll);  in _samsung_clk_register_pll()