Lines Matching refs:pll_con0

250 	u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;  in samsung_pll36xx_recalc_rate()  local
254 pll_con0 = __raw_readl(pll->con_reg); in samsung_pll36xx_recalc_rate()
256 mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK; in samsung_pll36xx_recalc_rate()
257 pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK; in samsung_pll36xx_recalc_rate()
258 sdiv = (pll_con0 >> PLL36XX_SDIV_SHIFT) & PLL36XX_SDIV_MASK; in samsung_pll36xx_recalc_rate()
269 const struct samsung_pll_rate_table *rate, u32 pll_con0, u32 pll_con1) in samsung_pll36xx_mpk_change() argument
273 old_mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK; in samsung_pll36xx_mpk_change()
274 old_pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK; in samsung_pll36xx_mpk_change()
285 u32 tmp, pll_con0, pll_con1; in samsung_pll36xx_set_rate() local
295 pll_con0 = __raw_readl(pll->con_reg); in samsung_pll36xx_set_rate()
298 if (!(samsung_pll36xx_mpk_change(rate, pll_con0, pll_con1))) { in samsung_pll36xx_set_rate()
300 pll_con0 &= ~(PLL36XX_SDIV_MASK << PLL36XX_SDIV_SHIFT); in samsung_pll36xx_set_rate()
301 pll_con0 |= (rate->sdiv << PLL36XX_SDIV_SHIFT); in samsung_pll36xx_set_rate()
302 __raw_writel(pll_con0, pll->con_reg); in samsung_pll36xx_set_rate()
311 pll_con0 &= ~((PLL36XX_MDIV_MASK << PLL36XX_MDIV_SHIFT) | in samsung_pll36xx_set_rate()
314 pll_con0 |= (rate->mdiv << PLL36XX_MDIV_SHIFT) | in samsung_pll36xx_set_rate()
317 __raw_writel(pll_con0, pll->con_reg); in samsung_pll36xx_set_rate()
381 static bool samsung_pll45xx_mp_change(u32 pll_con0, u32 pll_con1, in samsung_pll45xx_mp_change() argument
386 old_mdiv = (pll_con0 >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK; in samsung_pll45xx_mp_change()
387 old_pdiv = (pll_con0 >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK; in samsung_pll45xx_mp_change()
511 u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1, shift; in samsung_pll46xx_recalc_rate() local
514 pll_con0 = __raw_readl(pll->con_reg); in samsung_pll46xx_recalc_rate()
516 mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & ((pll->type == pll_1460x) ? in samsung_pll46xx_recalc_rate()
518 pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK; in samsung_pll46xx_recalc_rate()
519 sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK; in samsung_pll46xx_recalc_rate()
532 static bool samsung_pll46xx_mpk_change(u32 pll_con0, u32 pll_con1, in samsung_pll46xx_mpk_change() argument
537 old_mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK; in samsung_pll46xx_mpk_change()
538 old_pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK; in samsung_pll46xx_mpk_change()
694 u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1; in samsung_pll6553_recalc_rate() local
697 pll_con0 = __raw_readl(pll->con_reg); in samsung_pll6553_recalc_rate()
699 mdiv = (pll_con0 >> PLL6553_MDIV_SHIFT) & PLL6553_MDIV_MASK; in samsung_pll6553_recalc_rate()
700 pdiv = (pll_con0 >> PLL6553_PDIV_SHIFT) & PLL6553_PDIV_MASK; in samsung_pll6553_recalc_rate()
701 sdiv = (pll_con0 >> PLL6553_SDIV_SHIFT) & PLL6553_SDIV_MASK; in samsung_pll6553_recalc_rate()
1086 u32 mdiv, pdiv, sdiv, pll_con0, pll_con2; in samsung_pll2650xx_recalc_rate() local
1090 pll_con0 = __raw_readl(pll->con_reg); in samsung_pll2650xx_recalc_rate()
1092 mdiv = (pll_con0 >> PLL2650XX_MDIV_SHIFT) & PLL2650XX_MDIV_MASK; in samsung_pll2650xx_recalc_rate()
1093 pdiv = (pll_con0 >> PLL2650XX_PDIV_SHIFT) & PLL2650XX_PDIV_MASK; in samsung_pll2650xx_recalc_rate()
1094 sdiv = (pll_con0 >> PLL2650XX_SDIV_SHIFT) & PLL2650XX_SDIV_MASK; in samsung_pll2650xx_recalc_rate()
1108 u32 tmp, pll_con0, pll_con2; in samsung_pll2650xx_set_rate() local
1118 pll_con0 = __raw_readl(pll->con_reg); in samsung_pll2650xx_set_rate()
1122 pll_con0 &= ~(PLL2650XX_MDIV_MASK << PLL2650XX_MDIV_SHIFT | in samsung_pll2650xx_set_rate()
1125 pll_con0 |= rate->mdiv << PLL2650XX_MDIV_SHIFT; in samsung_pll2650xx_set_rate()
1126 pll_con0 |= rate->pdiv << PLL2650XX_PDIV_SHIFT; in samsung_pll2650xx_set_rate()
1127 pll_con0 |= rate->sdiv << PLL2650XX_SDIV_SHIFT; in samsung_pll2650xx_set_rate()
1128 pll_con0 |= 1 << PLL2650XX_PLL_ENABLE_SHIFT; in samsung_pll2650xx_set_rate()
1129 pll_con0 |= 1 << PLL2650XX_PLL_FOUTMASK_SHIFT; in samsung_pll2650xx_set_rate()
1138 __raw_writel(pll_con0, pll->con_reg); in samsung_pll2650xx_set_rate()