131 #define MUX(_name, _parents, _offset,	\  argument
133 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
135 			_clk_num,  _gate_flags, _clk_id, _parents##_idx, 0,\
138 #define MUX_FLAGS(_name, _parents, _offset,\  argument
140 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
142 			_clk_num, _gate_flags, _clk_id, _parents##_idx, flags,\
145 #define MUX8(_name, _parents, _offset, \  argument
147 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
149 			_clk_num, _gate_flags, _clk_id, _parents##_idx, 0,\
152 #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock)	\  argument
153 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,	\
156 			      _parents##_idx, 0, _lock)
158 #define INT(_name, _parents, _offset,	\  argument
160 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
163 			_clk_id, _parents##_idx, 0, NULL)
165 #define INT_FLAGS(_name, _parents, _offset,\  argument
167 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
170 			_clk_id, _parents##_idx, flags, NULL)
172 #define INT8(_name, _parents, _offset,\  argument
174 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
177 			_clk_id, _parents##_idx, 0, NULL)
179 #define UART(_name, _parents, _offset,\  argument
181 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
184 			_parents##_idx, 0, NULL)
186 #define I2C(_name, _parents, _offset,\  argument
188 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
190 			_clk_num, 0, _clk_id, _parents##_idx, 0, NULL)
192 #define XUSB(_name, _parents, _offset, \  argument
194 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
197 			_clk_id, _parents##_idx, 0, NULL)
206 #define NODIV(_name, _parents, _offset, \  argument
209 	TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
212 			_clk_id, _parents##_idx, 0, _lock)