938 static struct clk **clks;  variable
950 	clks[TEGRA114_CLK_CLK_32K] = clk;  in tegra114_fixed_clk_init()
955 	clks[TEGRA114_CLK_CLK_M_DIV2] = clk;  in tegra114_fixed_clk_init()
960 	clks[TEGRA114_CLK_CLK_M_DIV4] = clk;  in tegra114_fixed_clk_init()
1055 	clks[TEGRA114_CLK_PLL_C] = clk;  in tegra114_pll_init()
1064 	clks[TEGRA114_CLK_PLL_C_OUT1] = clk;  in tegra114_pll_init()
1069 	clks[TEGRA114_CLK_PLL_C2] = clk;  in tegra114_pll_init()
1074 	clks[TEGRA114_CLK_PLL_C3] = clk;  in tegra114_pll_init()
1080 	clks[TEGRA114_CLK_PLL_M] = clk;  in tegra114_pll_init()
1089 	clks[TEGRA114_CLK_PLL_M_OUT1] = clk;  in tegra114_pll_init()
1102 	clks[TEGRA114_CLK_PLL_U] = clk;  in tegra114_pll_init()
1110 	clks[TEGRA114_CLK_PLL_U_480M] = clk;  in tegra114_pll_init()
1115 	clks[TEGRA114_CLK_PLL_U_60M] = clk;  in tegra114_pll_init()
1120 	clks[TEGRA114_CLK_PLL_U_48M] = clk;  in tegra114_pll_init()
1125 	clks[TEGRA114_CLK_PLL_U_12M] = clk;  in tegra114_pll_init()
1130 	clks[TEGRA114_CLK_PLL_D] = clk;  in tegra114_pll_init()
1135 	clks[TEGRA114_CLK_PLL_D_OUT0] = clk;  in tegra114_pll_init()
1140 	clks[TEGRA114_CLK_PLL_D2] = clk;  in tegra114_pll_init()
1145 	clks[TEGRA114_CLK_PLL_D2_OUT0] = clk;  in tegra114_pll_init()
1150 	clks[TEGRA114_CLK_PLL_RE_VCO] = clk;  in tegra114_pll_init()
1155 	clks[TEGRA114_CLK_PLL_RE_OUT] = clk;  in tegra114_pll_init()
1160 	clks[TEGRA114_CLK_PLL_E_OUT0] = clk;  in tegra114_pll_init()
1179 	clks[TEGRA114_CLK_XUSB_SS_DIV2] = clk;  in tegra114_periph_clk_init()
1186 	clks[TEGRA114_CLK_DSIA_MUX] = clk;  in tegra114_periph_clk_init()
1193 	clks[TEGRA114_CLK_DSIB_MUX] = clk;  in tegra114_periph_clk_init()
1197 	clks[TEGRA114_CLK_DSIA] = clk;  in tegra114_periph_clk_init()
1201 	clks[TEGRA114_CLK_DSIB] = clk;  in tegra114_periph_clk_init()
1212 	clks[TEGRA114_CLK_MC] = clk;  in tegra114_periph_clk_init()
1219 		clks[data->clk_id] = clk;  in tegra114_periph_clk_init()
1322 	tegra_init_from_table(init_table, clks, TEGRA114_CLK_CLK_MAX);  in tegra114_clock_apply_init_table()
1473 	clks = tegra_clk_init(clk_base, TEGRA114_CLK_CLK_MAX,  in tegra114_clock_init()
1475 	if (!clks)  in tegra114_clock_init()