Lines Matching refs:gt_base
50 static void __iomem *gt_base; variable
69 upper = readl_relaxed(gt_base + GT_COUNTER1); in gt_counter_read()
72 lower = readl_relaxed(gt_base + GT_COUNTER0); in gt_counter_read()
73 upper = readl_relaxed(gt_base + GT_COUNTER1); in gt_counter_read()
97 writel(ctrl, gt_base + GT_CONTROL); in gt_compare_set()
98 writel(lower_32_bits(counter), gt_base + GT_COMP0); in gt_compare_set()
99 writel(upper_32_bits(counter), gt_base + GT_COMP1); in gt_compare_set()
102 writel(delta, gt_base + GT_AUTO_INC); in gt_compare_set()
107 writel(ctrl, gt_base + GT_CONTROL); in gt_compare_set()
122 ctrl = readl(gt_base + GT_CONTROL); in gt_clockevent_set_mode()
125 writel(ctrl, gt_base + GT_CONTROL); in gt_clockevent_set_mode()
143 if (!(readl_relaxed(gt_base + GT_INT_STATUS) & in gt_clockevent_interrupt()
161 writel_relaxed(GT_INT_STATUS_EVENT_FLAG, gt_base + GT_INT_STATUS); in gt_clockevent_interrupt()
213 writel(0, gt_base + GT_CONTROL); in gt_clocksource_init()
214 writel(0, gt_base + GT_COUNTER0); in gt_clocksource_init()
215 writel(0, gt_base + GT_COUNTER1); in gt_clocksource_init()
217 writel(GT_CONTROL_TIMER_ENABLE, gt_base + GT_CONTROL); in gt_clocksource_init()
265 gt_base = of_iomap(np, 0); in global_timer_of_register()
266 if (!gt_base) { in global_timer_of_register()
317 iounmap(gt_base); in global_timer_of_register()