Lines Matching refs:lo

99 	u32 lo, hi;  in pending_bit_stuck()  local
101 rdmsr(MSR_FIDVID_STATUS, lo, hi); in pending_bit_stuck()
102 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; in pending_bit_stuck()
111 u32 lo, hi; in query_current_values_with_pending_wait() local
119 rdmsr(MSR_FIDVID_STATUS, lo, hi); in query_current_values_with_pending_wait()
120 } while (lo & MSR_S_LO_CHANGE_PENDING); in query_current_values_with_pending_wait()
123 data->currfid = lo & MSR_S_LO_CURRENT_FID; in query_current_values_with_pending_wait()
145 u32 lo, hi; in fidvid_msr_init() local
148 rdmsr(MSR_FIDVID_STATUS, lo, hi); in fidvid_msr_init()
150 fid = lo & MSR_S_LO_CURRENT_FID; in fidvid_msr_init()
151 lo = fid | (vid << MSR_C_LO_VID_SHIFT); in fidvid_msr_init()
153 pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); in fidvid_msr_init()
154 wrmsr(MSR_FIDVID_CTL, lo, hi); in fidvid_msr_init()
160 u32 lo; in write_new_fid() local
169 lo = fid; in write_new_fid()
170 lo |= (data->currvid << MSR_C_LO_VID_SHIFT); in write_new_fid()
171 lo |= MSR_C_LO_INIT_FID_VID; in write_new_fid()
174 fid, lo, data->plllock * PLL_LOCK_CONVERSION); in write_new_fid()
177 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); in write_new_fid()
204 u32 lo; in write_new_vid() local
213 lo = data->currfid; in write_new_vid()
214 lo |= (vid << MSR_C_LO_VID_SHIFT); in write_new_vid()
215 lo |= MSR_C_LO_INIT_FID_VID; in write_new_vid()
218 vid, lo, STOP_GRANT_5NS); in write_new_vid()
221 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); in write_new_vid()
297 u32 maxvid, lo, rvomult = 1; in core_voltage_pre_transition() local
306 rdmsr(MSR_FIDVID_STATUS, lo, maxvid); in core_voltage_pre_transition()