141 	struct atmel_aes_dma	dma_lch_out;  member
330 		dd->dma_lch_out.dma_conf.src_addr_width =  in atmel_aes_crypt_dma()
335 		dd->dma_lch_out.dma_conf.src_addr_width =  in atmel_aes_crypt_dma()
340 		dd->dma_lch_out.dma_conf.src_addr_width =  in atmel_aes_crypt_dma()
348 		dd->dma_lch_out.dma_conf.src_maxburst = 1;  in atmel_aes_crypt_dma()
349 		dd->dma_lch_out.dma_conf.dst_maxburst = 1;  in atmel_aes_crypt_dma()
353 		dd->dma_lch_out.dma_conf.src_maxburst = dd->caps.max_burst_size;  in atmel_aes_crypt_dma()
354 		dd->dma_lch_out.dma_conf.dst_maxburst = dd->caps.max_burst_size;  in atmel_aes_crypt_dma()
358 	dmaengine_slave_config(dd->dma_lch_out.chan, &dd->dma_lch_out.dma_conf);  in atmel_aes_crypt_dma()
376 	out_desc = dmaengine_prep_slave_sg(dd->dma_lch_out.chan, &sg[1],  in atmel_aes_crypt_dma()
386 	dma_async_issue_pending(dd->dma_lch_out.chan);  in atmel_aes_crypt_dma()
792 	dd->dma_lch_out.chan = dma_request_slave_channel_compat(mask,  in atmel_aes_dma_init()
794 	if (!dd->dma_lch_out.chan)  in atmel_aes_dma_init()
797 	dd->dma_lch_out.dma_conf.direction = DMA_DEV_TO_MEM;  in atmel_aes_dma_init()
798 	dd->dma_lch_out.dma_conf.src_addr = dd->phys_base +  in atmel_aes_dma_init()
800 	dd->dma_lch_out.dma_conf.src_maxburst = dd->caps.max_burst_size;  in atmel_aes_dma_init()
801 	dd->dma_lch_out.dma_conf.src_addr_width =  in atmel_aes_dma_init()
803 	dd->dma_lch_out.dma_conf.dst_maxburst = dd->caps.max_burst_size;  in atmel_aes_dma_init()
804 	dd->dma_lch_out.dma_conf.dst_addr_width =  in atmel_aes_dma_init()
806 	dd->dma_lch_out.dma_conf.device_fc = false;  in atmel_aes_dma_init()
820 	dma_release_channel(dd->dma_lch_out.chan);  in atmel_aes_dma_cleanup()
1427 			dma_chan_name(aes_dd->dma_lch_out.chan));  in atmel_aes_probe()