29 #define		AT_DMA_SSREQ(x)	(0x1 << ((x) << 1))		/* Request a source single transfer on channel x */  argument
30 #define		AT_DMA_DSREQ(x)	(0x1 << (1 + ((x) << 1)))	/* Request a destination single transfer on chan…  argument
33 #define		AT_DMA_SCREQ(x)	(0x1 << ((x) << 1))		/* Request a source chunk transfer on channel x */  argument
34 #define		AT_DMA_DCREQ(x)	(0x1 << (1 + ((x) << 1)))	/* Request a destination chunk transfer on chann…  argument
37 #define		AT_DMA_SLAST(x)	(0x1 << ((x) << 1))		/* This src rq is last tx of buffer on channel x */  argument
38 #define		AT_DMA_DLAST(x)	(0x1 << (1 + ((x) << 1)))	/* This dst rq is last tx of buffer on channel x…  argument
50 #define		AT_DMA_BTC(x)	(0x1 << (x))  argument
51 #define		AT_DMA_CBTC(x)	(0x1 << (AT_DMA_CBTC_OFFSET + (x)))  argument
52 #define		AT_DMA_ERR(x)	(0x1 << (AT_DMA_ERR_OFFSET + (x)))  argument
55 #define		AT_DMA_ENA(x)	(0x1 << (x))  argument
56 #define		AT_DMA_SUSP(x)	(0x1 << ( 8 + (x)))  argument
57 #define		AT_DMA_KEEP(x)	(0x1 << (24 + (x)))  argument
60 #define		AT_DMA_DIS(x)	(0x1 << (x))  argument
61 #define		AT_DMA_RES(x)	(0x1 << ( 8 + (x)))  argument
64 #define		AT_DMA_EMPT(x)	(0x1 << (16 + (x)))  argument
65 #define		AT_DMA_STAL(x)	(0x1 << (24 + (x)))  argument
69 #define	ch_regs(x)	(AT_DMA_CH_REGS_BASE + (x) * 0x28) /* Channel x base addr */  argument
89 #define	ATC_BTSIZE(x)		(ATC_BTSIZE_MAX & (x)) /* Buffer Transfer Size */  argument
91 #define		ATC_SCSIZE(x)		(ATC_SCSIZE_MASK & ((x) << 16))  argument
101 #define		ATC_DCSIZE(x)		(ATC_DCSIZE_MASK & ((x) << 20))  argument
111 #define		ATC_SRC_WIDTH(x)	((x) << 24)  argument
116 #define		ATC_DST_WIDTH(x)	((x) << 28)  argument
157 #define	ATC_SPIP_HOLE(x)	(0xFFFFU & (x))  argument
158 #define	ATC_SPIP_BOUNDARY(x)	((0x3FF & (x)) << 16)  argument
161 #define	ATC_DPIP_HOLE(x)	(0xFFFFU & (x))  argument
162 #define	ATC_DPIP_BOUNDARY(x)	((0x3FF & (x)) << 16)  argument