169 	u32 tdcr;  in mmp_tdma_disable_chan()  local
171 	tdcr = readl(tdmac->reg_base + TDCR);  in mmp_tdma_disable_chan()
172 	tdcr |= TDCR_ABR;  in mmp_tdma_disable_chan()
173 	tdcr &= ~TDCR_CHANEN;  in mmp_tdma_disable_chan()
174 	writel(tdcr, tdmac->reg_base + TDCR);  in mmp_tdma_disable_chan()
206 	unsigned int tdcr = 0;  in mmp_tdma_config_chan()  local
211 		tdcr = TDCR_DSTDIR_ADDR_HOLD | TDCR_SRCDIR_ADDR_INC;  in mmp_tdma_config_chan()
213 		tdcr = TDCR_SRCDIR_ADDR_HOLD | TDCR_DSTDIR_ADDR_INC;  in mmp_tdma_config_chan()
216 		tdcr |= TDCR_PACKMOD;  in mmp_tdma_config_chan()
220 			tdcr |= TDCR_BURSTSZ_4B;  in mmp_tdma_config_chan()
223 			tdcr |= TDCR_BURSTSZ_8B;  in mmp_tdma_config_chan()
226 			tdcr |= TDCR_BURSTSZ_16B;  in mmp_tdma_config_chan()
229 			tdcr |= TDCR_BURSTSZ_32B;  in mmp_tdma_config_chan()
232 			tdcr |= TDCR_BURSTSZ_64B;  in mmp_tdma_config_chan()
235 			tdcr |= TDCR_BURSTSZ_128B;  in mmp_tdma_config_chan()
244 			tdcr |= TDCR_SSZ_8_BITS;  in mmp_tdma_config_chan()
247 			tdcr |= TDCR_SSZ_16_BITS;  in mmp_tdma_config_chan()
250 			tdcr |= TDCR_SSZ_32_BITS;  in mmp_tdma_config_chan()
257 		tdcr |= TDCR_SSPMOD;  in mmp_tdma_config_chan()
261 			tdcr |= TDCR_BURSTSZ_SQU_1B;  in mmp_tdma_config_chan()
264 			tdcr |= TDCR_BURSTSZ_SQU_2B;  in mmp_tdma_config_chan()
267 			tdcr |= TDCR_BURSTSZ_SQU_4B;  in mmp_tdma_config_chan()
270 			tdcr |= TDCR_BURSTSZ_SQU_8B;  in mmp_tdma_config_chan()
273 			tdcr |= TDCR_BURSTSZ_SQU_16B;  in mmp_tdma_config_chan()
276 			tdcr |= TDCR_BURSTSZ_SQU_32B;  in mmp_tdma_config_chan()
284 	writel(tdcr, tdmac->reg_base + TDCR);  in mmp_tdma_config_chan()