Lines Matching refs:DMA_CTL0_BITS_PER_CH
38 #define DMA_CTL0_BITS_PER_CH 4 macro
225 (DMA_CTL0_BITS_PER_CH * chan->chan_id); in pdc_set_dir()
227 (DMA_CTL0_BITS_PER_CH * chan->chan_id)); in pdc_set_dir()
230 val |= 0x1 << (DMA_CTL0_BITS_PER_CH * chan->chan_id + in pdc_set_dir()
233 val &= ~(0x1 << (DMA_CTL0_BITS_PER_CH * chan->chan_id + in pdc_set_dir()
243 (DMA_CTL0_BITS_PER_CH * ch); in pdc_set_dir()
245 (DMA_CTL0_BITS_PER_CH * ch)); in pdc_set_dir()
248 val |= 0x1 << (DMA_CTL0_BITS_PER_CH * ch + in pdc_set_dir()
251 val &= ~(0x1 << (DMA_CTL0_BITS_PER_CH * ch + in pdc_set_dir()
270 (DMA_CTL0_BITS_PER_CH * chan->chan_id)); in pdc_set_mode()
271 mask_dir = 1 << (DMA_CTL0_BITS_PER_CH * chan->chan_id +\ in pdc_set_mode()
275 val |= mode << (DMA_CTL0_BITS_PER_CH * chan->chan_id); in pdc_set_mode()
281 (DMA_CTL0_BITS_PER_CH * ch)); in pdc_set_mode()
282 mask_dir = 1 << (DMA_CTL0_BITS_PER_CH * ch +\ in pdc_set_mode()
286 val |= mode << (DMA_CTL0_BITS_PER_CH * ch); in pdc_set_mode()